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From: Christoph Hellwig <hch@infradead.org>
To: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Cc: bhelgaas@google.com, helgaas@kernel.org, linuxarm@huawei.com,
	linux-pci@vger.kernel.org, lukas@wunner.de,
	linux-kernel@vger.kernel.org, mika.westerberg@linux.intel.com,
	hch@infradead.org, liudongdong3@huawei.com
Subject: Re: [PATCH v3 1/2] PCI/portdrv: add support for different MSI interrupts for PCIe port services
Date: Sun, 21 May 2017 01:32:34 -0700	[thread overview]
Message-ID: <20170521083234.GA20658@infradead.org> (raw)
In-Reply-To: <1495103748-7876-2-git-send-email-gabriele.paoloni@huawei.com>

> +		 *
> +		 * pci_irq_vector() below is able to handle entry differently
> +		 * depending on MSI vs MSI-x case
> +		 *
>  		 */

One more instance of this comment left :)

>  		pcie_capability_read_word(dev, PCI_EXP_FLAGS, &reg16);
>  		entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
> @@ -100,7 +107,10 @@ static int pcie_port_enable_msix(struct pci_dev *dev, int *irqs, int mask)
>  		 * MSI/MSI-X vectors assigned to the port is going to be used
>  		 * for AER, where "For MSI-X, the value in this register
>  		 * indicates which MSI-X Table entry is used to generate the
> -		 * interrupt message."
> +		 * interrupt message."  and "For MSI, the value
> +		 * in this field indicates the offset between the base Message
> +		 * Data and the interrupt message that is generated."
> +		 *
>  		 */

And while this is getting a little too deep into nitpicking:  we usually
don't add empty lines to the end of comments.

  reply	other threads:[~2017-05-21  8:32 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-18 10:35 [PATCH v3 0/2] add MSI support for PCIe port services and DPC IRQ support Gabriele Paoloni
2017-05-18 10:35 ` [PATCH v3 1/2] PCI/portdrv: add support for different MSI interrupts for PCIe port services Gabriele Paoloni
2017-05-21  8:32   ` Christoph Hellwig [this message]
2017-05-21 15:00     ` Gabriele Paoloni
2017-05-22 17:44       ` Christoph Hellwig
2017-05-23 14:25         ` Gabriele Paoloni
2017-05-18 10:35 ` [PATCH v3 2/2] PCI/portdrv: allocate MSI/MSIx vector for DPC RP service Gabriele Paoloni

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