From: Christoph Hellwig <hch@infradead.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Christoph Hellwig <hch@infradead.org>, linux-pci@vger.kernel.org
Subject: Re: PCI endpoint API question
Date: Mon, 19 Jun 2017 08:05:47 -0700 [thread overview]
Message-ID: <20170619150547.GA22227@infradead.org> (raw)
In-Reply-To: <f7596eb9-cb96-7b82-699a-c8a1f7e85b6e@ti.com>
On Mon, Jun 19, 2017 at 03:20:29PM +0530, Kishon Vijay Abraham I wrote:
> > for writes to BARs - is this and intentional omission? It seems
> > like the only current option is to poll for changes.
>
> You mean write to the address that's mapped to BAR in the EP side?
>
> PCI doesn't allow hosts to interrupt the EP (AFAIK), so we have to poll for any
> writes by the host to EP memory.
At least out on the bus each MMIO access translates to PCIe Memory
Read/Write TLPs, so the EP itself for sure gets a notification. I don't
really know enough about existing programmable endpoint IP to know
how that could be forwarded to software, though.
next prev parent reply other threads:[~2017-06-19 15:06 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-18 14:05 PCI endpoint API question Christoph Hellwig
2017-06-19 9:50 ` Kishon Vijay Abraham I
2017-06-19 15:05 ` Christoph Hellwig [this message]
2017-07-11 11:02 ` Kishon Vijay Abraham I
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