From: Linus Walleij <linus.walleij@linaro.org>
To: Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Arnd Bergmann <arnd@arndb.de>
Cc: linux-pci@vger.kernel.org, Linus Walleij <linus.walleij@linaro.org>
Subject: [PATCH 1/2 v2] PCI: v3: Update the device tree bindings
Date: Wed, 9 Aug 2017 16:14:54 +0200 [thread overview]
Message-ID: <20170809141455.22220-1-linus.walleij@linaro.org> (raw)
The bindings for the V3 Semiconductor PCI bridge are a tad bit outdated
and predates the more formal format we have adopted for the bindings.
Update them a bit so it is easier to read, and add the Integrator AP-
specific compatible so we can detect that we are running on that specific
platform.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v2:
- Added Rob's ACK.
Bjorn: please merge this when you feel confident with it.
---
.../devicetree/bindings/pci/v3-v360epc-pci.txt | 19 ++++++++++---------
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt b/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt
index 30b364e504ba..bcc5fe2a74cb 100644
--- a/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt
+++ b/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt
@@ -2,14 +2,15 @@ V3 Semiconductor V360 EPC PCI bridge
This bridge is found in the ARM Integrator/AP (Application Platform)
-Integrator-specific notes:
-
-- syscon: should contain a link to the syscon device node (since
- on the Integrator, some registers in the syscon are required to
- operate the V3).
-
-V360 EPC specific notes:
-
-- reg: should contain the base address of the V3 adapter.
+Required properties:
+- compatible: should be one of:
+ "v3,v360epc-pci"
+ "arm,integrator-ap-pci", "v3,v360epc-pci"
+- reg: should contain the base address of the V3 host bridge.
- interrupts: should contain a reference to the V3 error interrupt
as routed on the system.
+
+Integrator-specific required properties:
+- syscon: should contain a link to the syscon device node, since
+ on the Integrator, some registers in the syscon are required to
+ operate the V3 host bridge.
--
2.9.4
next reply other threads:[~2017-08-09 14:15 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-09 14:14 Linus Walleij [this message]
2017-08-09 14:14 ` [PATCH 2/2 v2] PCI: v3-semi: Add a V3 Semiconductor PCI host driver Linus Walleij
2017-08-22 19:01 ` Bjorn Helgaas
2017-09-01 15:49 ` Linus Walleij
2017-09-01 22:17 ` Bjorn Helgaas
2017-08-22 19:09 ` [PATCH 1/2 v2] PCI: v3: Update the device tree bindings Bjorn Helgaas
2017-09-01 12:06 ` Linus Walleij
-- strict thread matches above, loose matches on Subject: below --
2017-08-09 14:14 Linus Walleij
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170809141455.22220-1-linus.walleij@linaro.org \
--to=linus.walleij@linaro.org \
--cc=arnd@arndb.de \
--cc=bhelgaas@google.com \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).