From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: Date: Tue, 17 Oct 2017 23:46:49 -0700 From: Christoph Hellwig To: Florian Fainelli Subject: Re: [PATCH 1/9] SOC: brcmstb: add memory API Message-ID: <20171018064649.GA7734@infradead.org> References: <1507761269-7017-1-git-send-email-jim2101024@gmail.com> <1507761269-7017-2-git-send-email-jim2101024@gmail.com> <20171017082413.GA10574@infradead.org> MIME-Version: 1.0 In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , linux-mips@linux-mips.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, Kevin Cernekee , Will Deacon , linux-kernel@vger.kernel.org, Ralf Baechle , Christoph Hellwig , Rob Herring , Jim Quinlan , bcm-kernel-feedback-list@broadcom.com, Gregory Fong , Catalin Marinas , Bjorn Helgaas , Brian Norris , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+bjorn=helgaas.com@lists.infradead.org List-ID: On Tue, Oct 17, 2017 at 09:12:22AM -0700, Florian Fainelli wrote: > > Please move this into the arm arch code. > > No, this needs to work on both ARM and ARM64, hence the reason why this > is in a reasonably architecture neutral place. So there is no other shared code between the ARM and ARM64 ports for this SOC? > >> +EXPORT_SYMBOL(brcmstb_memory_phys_addr_to_memc); > > > >> +EXPORT_SYMBOL(brcmstb_memory_memc_size); > > > > Why is this exported? > > Because the PCIE RC driver can be built as a module. Hmm, supporting PCIE RC as module sounds odd, but it seems like there are a few others like that. At least make it EXPORT_SYMBOL_GPL() then to document the internal nature. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel