From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Niklas Cassel <niklas.cassel@axis.com>,
Jingoo Han <jingoohan1@gmail.com>,
Joao Pinto <Joao.Pinto@synopsys.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Niklas Cassel <niklass@axis.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 01/18] PCI: dwc: Use the DMA-API to get the MSI address
Date: Thu, 30 Nov 2017 15:28:43 +0000 [thread overview]
Message-ID: <20171130152843.GC12096@red-moon> (raw)
In-Reply-To: <20171120133222.27771-2-niklas.cassel@axis.com>
Jingoo, Joao,
I am expecting your testing on the series and ACKs on the dwc related
patches please, according to v4 review - I will mark them as needs
review/ACK waiting for you to chime in.
v4 thread:
https://patchwork.ozlabs.org/patch/833882/
Thanks,
Lorenzo
On Mon, Nov 20, 2017 at 02:32:04PM +0100, Niklas Cassel wrote:
> Use the DMA-API to get the MSI address. This address will be written to
> our PCI config space and to the register which determines which AXI
> address the DWC IP will spoof for incoming MSI irqs.
>
> Since it is a PCIe endpoint device, rather than the CPU, that is supposed
> to write to the MSI address, the proper way to get the MSI address is by
> using the DMA API, not by using virt_to_phys().
>
> Using virt_to_phys() might work on some systems, but using the DMA API
> should work on all systems.
>
> This is essentially the same thing as allocating a buffer in a driver
> to which the endpoint will write to. To do this, we use the DMA API.
>
> Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
> ---
> drivers/pci/dwc/pcie-designware-host.c | 15 ++++++++++++---
> drivers/pci/dwc/pcie-designware.h | 3 ++-
> 2 files changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
> index 81e2157a7cfb..33b52fe98a01 100644
> --- a/drivers/pci/dwc/pcie-designware-host.c
> +++ b/drivers/pci/dwc/pcie-designware-host.c
> @@ -83,10 +83,19 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp)
>
> void dw_pcie_msi_init(struct pcie_port *pp)
> {
> + struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> + struct device *dev = pci->dev;
> + struct page *page;
> u64 msi_target;
>
> - pp->msi_data = __get_free_pages(GFP_KERNEL, 0);
> - msi_target = virt_to_phys((void *)pp->msi_data);
> + page = alloc_page(GFP_KERNEL | GFP_DMA32);
> + pp->msi_data = dma_map_page(dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
> + if (dma_mapping_error(dev, pp->msi_data)) {
> + dev_err(dev, "failed to map MSI data\n");
> + __free_page(page);
> + return;
> + }
> + msi_target = (u64)pp->msi_data;
>
> /* program the msi_data */
> dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4,
> @@ -187,7 +196,7 @@ static void dw_msi_setup_msg(struct pcie_port *pp, unsigned int irq, u32 pos)
> if (pp->ops->get_msi_addr)
> msi_target = pp->ops->get_msi_addr(pp);
> else
> - msi_target = virt_to_phys((void *)pp->msi_data);
> + msi_target = (u64)pp->msi_data;
>
> msg.address_lo = (u32)(msi_target & 0xffffffff);
> msg.address_hi = (u32)(msi_target >> 32 & 0xffffffff);
> diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-designware.h
> index e5d9d77b778e..ecdede68522a 100644
> --- a/drivers/pci/dwc/pcie-designware.h
> +++ b/drivers/pci/dwc/pcie-designware.h
> @@ -14,6 +14,7 @@
> #ifndef _PCIE_DESIGNWARE_H
> #define _PCIE_DESIGNWARE_H
>
> +#include <linux/dma-mapping.h>
> #include <linux/irq.h>
> #include <linux/msi.h>
> #include <linux/pci.h>
> @@ -168,7 +169,7 @@ struct pcie_port {
> const struct dw_pcie_host_ops *ops;
> int msi_irq;
> struct irq_domain *irq_domain;
> - unsigned long msi_data;
> + dma_addr_t msi_data;
> DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
> };
>
> --
> 2.14.2
>
next prev parent reply other threads:[~2017-11-30 15:28 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-20 13:32 [PATCH v5 00/18] dwc MSI fixes, ARTPEC-6 EP mode support, ARTPEC-7 SoC support Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 01/18] PCI: dwc: Use the DMA-API to get the MSI address Niklas Cassel
2017-11-30 15:28 ` Lorenzo Pieralisi [this message]
2017-12-13 13:59 ` Niklas Cassel
2017-12-13 14:31 ` Lorenzo Pieralisi
2017-12-13 17:21 ` Joao Pinto
2017-12-14 12:16 ` Gustavo Pimentel
2017-12-14 12:22 ` Lorenzo Pieralisi
2017-12-14 12:38 ` Gustavo Pimentel
2017-12-18 15:57 ` Lorenzo Pieralisi
2017-12-18 16:11 ` Gustavo Pimentel
[not found] ` <95866c7e-5177-69d6-ac64-1ba7f8b3e36d@synopsys.com>
2017-12-19 14:10 ` Lorenzo Pieralisi
2017-12-19 23:55 ` Niklas Cassel
2017-12-19 10:19 ` Lorenzo Pieralisi
2017-12-19 22:13 ` Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 02/18] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 03/18] PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 04/18] PCI: designware-ep: Pre-allocate memory for MSI in dw_pcie_ep_init Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 05/18] PCI: designware-ep: Remove static keyword from dw_pcie_ep_reset_bar() Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 06/18] PCI: designware-ep: Add generic function for raising MSI irq Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 07/18] PCI: dwc: dra7xx: Refactor Kconfig and Makefile handling for host/ep mode Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 08/18] PCI: dwc: dra7xx: Assign pp->ops in dra7xx_add_pcie_port() rather than in probe Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 09/18] PCI: dwc: dra7xx: Help compiler to remove unused code Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 10/18] PCI: dwc: artpec6: Remove unused defines Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 11/18] PCI: dwc: artpec6: Use BIT and GENMASK macros Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 12/18] PCI: dwc: artpec6: Split artpec6_pcie_establish_link() into smaller functions Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 13/18] bindings: PCI: artpec: Add support for endpoint mode Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 14/18] PCI: dwc: artpec6: " Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 15/18] PCI: dwc: Make cpu_addr_fixup take struct dw_pcie as argument Niklas Cassel
2017-12-18 18:10 ` Lorenzo Pieralisi
2017-12-18 21:15 ` Niklas Cassel
2017-12-19 10:48 ` Lorenzo Pieralisi
2017-11-20 13:32 ` [PATCH v5 16/18] PCI: dwc: artpec6: Deassert the core before waiting for PHY Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 17/18] bindings: PCI: artpec: Add support for the ARTPEC-7 SoC Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 18/18] PCI: dwc: artpec6: " Niklas Cassel
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