linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Thierry Reding <thierry.reding@gmail.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Vidya Sagar <vidyas@nvidia.com>,
	treding@nvidia.com, linux-tegra@vger.kernel.org,
	linux-pci@vger.kernel.org, kthota@nvidia.com,
	mmaddireddy@nvidia.com, robh+dt@kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH V3 0/2] Tegra PCIe end point config space map code refactoring
Date: Thu, 14 Dec 2017 15:01:02 +0100	[thread overview]
Message-ID: <20171214140102.GA13733@ulmo> (raw)
In-Reply-To: <20171214103722.GC697@e107981-ln.cambridge.arm.com>

[-- Attachment #1: Type: text/plain, Size: 2957 bytes --]

On Thu, Dec 14, 2017 at 10:37:22AM +0000, Lorenzo Pieralisi wrote:
> On Tue, Dec 12, 2017 at 01:22:52PM +0100, Thierry Reding wrote:
> 
> [...]
> 
> > > > > Hi Bjorn,
> > > > > 
> > > > > there's a bunch of PCI related patches for Tegra floating around on the
> > > > > lists. I'm wondering if you'd be okay if I pick those up into the Tegra
> > > > > tree after they've been reviewed and send you a pull request later on
> > > > > (say around v4.15-rc6). That would allow me to get things cooking in
> > > > > linux-next for a bit and get broader testing in addition to the
> > > > > flexibility to patch things up if they break.
> > > > 
> > > > Lorenzo will be merging the Tegra stuff, so this is more a question
> > > > for him.
> > > > 
> > > > Just to clarify, I think your questions is about putting those patches
> > > > in
> > > > git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git#for-next.
> > > > If you put them there they will show up in linux-next, and then when
> > > > Lorenzo merges them, you'll have to coordinate so they don't get
> > > > merged into linux-next twice (once via the usual PCI tree route and
> > > > again via the Tegra tree).
> > > > 
> > > > If you wait until after they've been reviewed to put them into the
> > > > Tegra tree, I'm not sure what the gain is, because I assume Lorenzo
> > > > would merge them at about that same point.
> > > 
> > > I think that after the review, the Tegra patches that are considered for
> > > upstream they should go to -next via the PCI tree as any other platform PCI
> > > patches; the relevant patches need ACKs from the respective platform
> > > maintainer - I am getting to them as fast as I can.
> > 
> > Just to clarify: I wasn't suggesting that these patches are merged for
> > v4.16 via the Tegra tree, only that I carry them in the Tegra tree for a
> > little while so that we can get broader testing and fix things up in
> > case they break. My proposal was to then send a pull request for
> > inclusion in the PCI tree. linux-next can deal with this type of
> > scenario just fine because it will simply see the same branch twice and
> > ignore the second one.
> > 
> > If you prefer to merge directly via the PCI tree that works for me too.
> 
> We would end up merging the patches into -next at the same time, so there
> is not much point in queuing them via Tegra if they go via the PCI tree
> eventually; we should not add to -next patches that are not ready to
> be merged anyway.
> 
> I need your help (ACKs) though to queue them up - I review the patches
> but I can neither test them nor get access to HW TRMs so for some of them
> there is not much I can do.

I've sent out a small series of patches that apply on top of this patch
which clean up and fix a couple of issues with this patch. Feel free to
squash those into this patch if you prefer.

Acked-by: Thierry Reding <treding@nvidia.com>

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

  reply	other threads:[~2017-12-14 14:01 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-04 17:53 [PATCH V3 0/2] Tegra PCIe end point config space map code refactoring Vidya Sagar
2017-12-04 17:53 ` [PATCH V3 1/2] PCI: tegra: refactor config space mapping code Vidya Sagar
2017-12-04 17:53 ` [PATCH V3 2/2] ARM64: tegra: limit PCIe config space mapping to 4K for T186 Vidya Sagar
2017-12-11 10:54 ` [PATCH V3 0/2] Tegra PCIe end point config space map code refactoring Thierry Reding
2017-12-11 17:54   ` Bjorn Helgaas
2017-12-12 11:01     ` Lorenzo Pieralisi
2017-12-12 12:22       ` Thierry Reding
2017-12-14 10:37         ` Lorenzo Pieralisi
2017-12-14 14:01           ` Thierry Reding [this message]
  -- strict thread matches above, loose matches on Subject: below --
2017-10-24  6:44 Vidya Sagar
2017-10-24 20:15 ` Bjorn Helgaas
2017-11-06 19:51   ` Bjorn Helgaas
2017-11-20 10:27     ` Vidya Sagar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20171214140102.GA13733@ulmo \
    --to=thierry.reding@gmail.com \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=helgaas@kernel.org \
    --cc=kthota@nvidia.com \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=mmaddireddy@nvidia.com \
    --cc=robh+dt@kernel.org \
    --cc=treding@nvidia.com \
    --cc=vidyas@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).