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* [PATCH v2] PCI: dwc: Use {upper,lower}_32_bits() macros for clarity
@ 2017-12-27 23:25 Stephen Boyd
  2017-12-28 15:33 ` Joao Pinto
  0 siblings, 1 reply; 4+ messages in thread
From: Stephen Boyd @ 2017-12-27 23:25 UTC (permalink / raw)
  To: Lorenzo Pieralisi
  Cc: Jingoo Han, Joao Pinto, linux-kernel, Bjorn Helgaas, linux-pci

We have macros for getting the upper or lower 32 bits of a
number. Use them here to shave a couple lines off the code
and provide clarity.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---

Changes from v1:
 * Update dw_msi_setup_msg() too
 * Reword commit text slightly

 drivers/pci/dwc/pcie-designware-host.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
index 81e2157a7cfb..454b8d244071 100644
--- a/drivers/pci/dwc/pcie-designware-host.c
+++ b/drivers/pci/dwc/pcie-designware-host.c
@@ -89,10 +89,8 @@ void dw_pcie_msi_init(struct pcie_port *pp)
 	msi_target = virt_to_phys((void *)pp->msi_data);
 
 	/* program the msi_data */
-	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4,
-			    (u32)(msi_target & 0xffffffff));
-	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4,
-			    (u32)(msi_target >> 32 & 0xffffffff));
+	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4, lower_32_bits(msi_target));
+	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4, upper_32_bits(msi_target));
 }
 
 static void dw_pcie_msi_clear_irq(struct pcie_port *pp, int irq)
@@ -189,8 +187,8 @@ static void dw_msi_setup_msg(struct pcie_port *pp, unsigned int irq, u32 pos)
 	else
 		msi_target = virt_to_phys((void *)pp->msi_data);
 
-	msg.address_lo = (u32)(msi_target & 0xffffffff);
-	msg.address_hi = (u32)(msi_target >> 32 & 0xffffffff);
+	msg.address_lo = lower_32_bits(msi_target);
+	msg.address_hi = upper_32_bits(msi_target);
 
 	if (pp->ops->get_msi_data)
 		msg.data = pp->ops->get_msi_data(pp, pos);
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH v2] PCI: dwc: Use {upper,lower}_32_bits() macros for clarity
  2017-12-27 23:25 [PATCH v2] PCI: dwc: Use {upper,lower}_32_bits() macros for clarity Stephen Boyd
@ 2017-12-28 15:33 ` Joao Pinto
  2017-12-28 16:09   ` Stephen Boyd
  0 siblings, 1 reply; 4+ messages in thread
From: Joao Pinto @ 2017-12-28 15:33 UTC (permalink / raw)
  To: Stephen Boyd, Lorenzo Pieralisi
  Cc: Jingoo Han, Joao Pinto, linux-kernel, Bjorn Helgaas, linux-pci,
	Gustavo.Pimentel


Hi Stephen,

Às 11:25 PM de 12/27/2017, Stephen Boyd escreveu:
> We have macros for getting the upper or lower 32 bits of a
> number. Use them here to shave a couple lines off the code
> and provide clarity.
> 
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
> 
> Changes from v1:
>  * Update dw_msi_setup_msg() too
>  * Reword commit text slightly
> 
>  drivers/pci/dwc/pcie-designware-host.c | 10 ++++------
>  1 file changed, 4 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
> index 81e2157a7cfb..454b8d244071 100644
> --- a/drivers/pci/dwc/pcie-designware-host.c
> +++ b/drivers/pci/dwc/pcie-designware-host.c
> @@ -89,10 +89,8 @@ void dw_pcie_msi_init(struct pcie_port *pp)
>  	msi_target = virt_to_phys((void *)pp->msi_data);
>  
>  	/* program the msi_data */
> -	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4,
> -			    (u32)(msi_target & 0xffffffff));
> -	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4,
> -			    (u32)(msi_target >> 32 & 0xffffffff));
> +	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4, lower_32_bits(msi_target));
> +	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4, upper_32_bits(msi_target));
>  }
>  
>  static void dw_pcie_msi_clear_irq(struct pcie_port *pp, int irq)
> @@ -189,8 +187,8 @@ static void dw_msi_setup_msg(struct pcie_port *pp, unsigned int irq, u32 pos)
>  	else
>  		msi_target = virt_to_phys((void *)pp->msi_data);
>  
> -	msg.address_lo = (u32)(msi_target & 0xffffffff);
> -	msg.address_hi = (u32)(msi_target >> 32 & 0xffffffff);
> +	msg.address_lo = lower_32_bits(msi_target);
> +	msg.address_hi = upper_32_bits(msi_target);
>  
>  	if (pp->ops->get_msi_data)
>  		msg.data = pp->ops->get_msi_data(pp, pos);
> 

Thanks for the patch.
Gustavo' patch-set targeting the update of the Interrupt API for
pcie-designware* already does this modification, so I would suggest that we wait
for Gustavo' patch to be stable and get the same modification.

Best regards,
Joao Pinto

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v2] PCI: dwc: Use {upper,lower}_32_bits() macros for clarity
  2017-12-28 15:33 ` Joao Pinto
@ 2017-12-28 16:09   ` Stephen Boyd
  2018-01-02 10:28     ` Lorenzo Pieralisi
  0 siblings, 1 reply; 4+ messages in thread
From: Stephen Boyd @ 2017-12-28 16:09 UTC (permalink / raw)
  To: Joao Pinto
  Cc: Lorenzo Pieralisi, Jingoo Han, linux-kernel, Bjorn Helgaas,
	linux-pci, Gustavo.Pimentel

On 12/28, Joao Pinto wrote:
> >  	if (pp->ops->get_msi_data)
> >  		msg.data = pp->ops->get_msi_data(pp, pos);
> > 
> 
> Thanks for the patch.
> Gustavo' patch-set targeting the update of the Interrupt API for
> pcie-designware* already does this modification, so I would suggest that we wait
> for Gustavo' patch to be stable and get the same modification.
> 

Ok.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v2] PCI: dwc: Use {upper,lower}_32_bits() macros for clarity
  2017-12-28 16:09   ` Stephen Boyd
@ 2018-01-02 10:28     ` Lorenzo Pieralisi
  0 siblings, 0 replies; 4+ messages in thread
From: Lorenzo Pieralisi @ 2018-01-02 10:28 UTC (permalink / raw)
  To: Stephen Boyd
  Cc: Joao Pinto, Jingoo Han, linux-kernel, Bjorn Helgaas, linux-pci,
	Gustavo.Pimentel

On Thu, Dec 28, 2017 at 08:09:55AM -0800, Stephen Boyd wrote:
> On 12/28, Joao Pinto wrote:
> > >  	if (pp->ops->get_msi_data)
> > >  		msg.data = pp->ops->get_msi_data(pp, pos);
> > > 
> > 
> > Thanks for the patch.
> > Gustavo' patch-set targeting the update of the Interrupt API for
> > pcie-designware* already does this modification, so I would suggest that we wait
> > for Gustavo' patch to be stable and get the same modification.
> > 
> 
> Ok.

Ok, marked as superseded, thanks.

Lorenzo

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2018-01-02 10:28 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2017-12-27 23:25 [PATCH v2] PCI: dwc: Use {upper,lower}_32_bits() macros for clarity Stephen Boyd
2017-12-28 15:33 ` Joao Pinto
2017-12-28 16:09   ` Stephen Boyd
2018-01-02 10:28     ` Lorenzo Pieralisi

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