Re: [PATCH] Fix Vector table and PBA addresses print output

[Alex Williamson <alex.williamson@redhat.com>]

On Tue, 30 Jan 2018 10:34:08 +0000
Gustavo Pimentel <gustavo.pimentel@synopsys.com> wrote:

> Lack of 3-bit rotation to the right was leading to erroneous display of the
> vector table and PBA.
> 
> Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> ---
>  ls-caps.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/ls-caps.c b/ls-caps.c
> index 507771a..cd13a37 100644
> --- a/ls-caps.c
> +++ b/ls-caps.c
> @@ -1104,10 +1104,10 @@ cap_msix(struct device *d, int where, int cap)
>  
>    off = get_conf_long(d, where + PCI_MSIX_TABLE);
>    printf("\t\tVector table: BAR=%d offset=%08x\n",
> -	 off & PCI_MSIX_BIR, off & ~PCI_MSIX_BIR);
> +	 off & PCI_MSIX_BIR, (off & ~PCI_MSIX_BIR) >> 3);
>    off = get_conf_long(d, where + PCI_MSIX_PBA);
>    printf("\t\tPBA: BAR=%d offset=%08x\n",
> -	 off & PCI_MSIX_BIR, off & ~PCI_MSIX_BIR);
> +	 off & PCI_MSIX_BIR, (off & ~PCI_MSIX_BIR) >> 3);
>  }
>  
>  static void


The code is correct as is, the register contains bits 31:3 of the
offset.  The spec states (PCI rev 3.0, 6.8.2.4, 6.8.2.5):

  The lower 3 Table BIR bits are masked off (set to zero) by software
  to form a 32-bit QWORD -aligned offset.

  The lower 3 PBA BIR bits are masked off (set to zero) by software to
  form a 32-bit QWORD-aligned offset.

Shifting is incorrect, the mask operation fills the lower 3 bits.
Thanks,

Alex