From: Keith Busch <keith.busch@intel.com>
To: "poza@codeaurora.org" <poza@codeaurora.org>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Philippe Ombredanne <pombredanne@nexb.com>,
Thomas Gleixner <tglx@linutronix.de>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Kate Stewart <kstewart@linuxfoundation.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Dongdong Liu <liudongdong3@huawei.com>, Wei Zhang <wzhang@fb.com>,
Sinan Kaya <okaya@codeaurora.org>,
Timur Tabi <timur@codeaurora.org>
Subject: Re: [PATCH NEXT 6/6] PCI/PORTDRV: Remove ERR_FATAL handling from pcie_portdrv_slot_reset()
Date: Fri, 8 Jun 2018 16:43:30 -0600 [thread overview]
Message-ID: <20180608224330.GA25132@localhost.localdomain> (raw)
In-Reply-To: <f9a6f1ae2e7c17f87e465e643c8e6dcc@codeaurora.org>
On Thu, Jun 07, 2018 at 09:47:42PM -0700, poza@codeaurora.org wrote:
> Keith,
>
> do you know why in ERR_FATAL case following was done ?
> have a look at pcie_portdrv_slot_reset() handling (for bridges, switches
> etc..)
Not sure, but I was looking into some issues in this area anyway.
I'm finding that non-hotpluggable bridges that support D3 are getting
put into that low-power mode, and that pretty much breaks the
re-enumeration.
next prev parent reply other threads:[~2018-06-08 22:43 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-07 6:00 [PATCH NEXT 1/6] PCI/AER: Take mask into account while clearing error bits Oza Pawandeep
2018-06-07 6:00 ` [PATCH NEXT 2/6] PCI/AER: Clear uncorrectable fatal error status bits Oza Pawandeep
2018-06-07 6:00 ` [PATCH NEXT 3/6] PCI/ERR: Cleanup ERR_FATAL of error broadcast Oza Pawandeep
2018-06-07 6:00 ` [PATCH NEXT 4/6] PCI/AER: Clear device status error bits during ERR_FATAL and ERR_NONFATAL Oza Pawandeep
2018-06-07 6:00 ` [PATCH NEXT 5/6] PCI/AER: Clear correctable status bits in device register Oza Pawandeep
2018-06-07 6:00 ` [PATCH NEXT 6/6] PCI/PORTDRV: Remove ERR_FATAL handling from pcie_portdrv_slot_reset() Oza Pawandeep
2018-06-07 13:48 ` poza
2018-06-07 21:34 ` Bjorn Helgaas
2018-06-08 4:47 ` poza
2018-06-08 22:43 ` Keith Busch [this message]
2018-06-08 4:57 ` poza
2018-06-08 10:41 ` okaya
2018-06-11 10:01 ` poza
2018-06-11 12:50 ` poza
2018-06-07 13:21 ` [PATCH NEXT 1/6] PCI/AER: Take mask into account while clearing error bits Bjorn Helgaas
2018-06-07 13:44 ` poza
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