From: Keith Busch <keith.busch@intel.com>
To: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Len Brown <lenb@kernel.org>, Lukas Wunner <lukas@wunner.de>,
Ashok Raj <ashok.raj@intel.com>,
Mario.Limonciello@dell.com,
Anthony Wong <anthony.wong@canonical.com>,
"D . J . Bernstein" <djb@cr.yp.to>,
Linus Walleij <linus.walleij@linaro.org>,
linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org
Subject: Re: [PATCH 04/10] PCI: pciehp: Do not handle events if interrupts are masked
Date: Fri, 7 Sep 2018 16:45:46 -0600 [thread overview]
Message-ID: <20180907224546.GA1598@localhost.localdomain> (raw)
In-Reply-To: <20180906155020.51700-5-mika.westerberg@linux.intel.com>
On Thu, Sep 06, 2018 at 06:50:14PM +0300, Mika Westerberg wrote:
> PCIe native hotplug shares MSI vector with native PME so the interrupt
> handler might get called even the hotplug interrupt is masked. In that
> case we should not handle any events because the interrupt was not meant
> for us. Modify the PCIe hotplug interrupt handler to check this
> accordingly and bail out if it finds out that the interrupt was not
> about hotplug.
>
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> ---
> drivers/pci/hotplug/pciehp_hpc.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
> index 2249c4d06efd..19ed13d44b8f 100644
> --- a/drivers/pci/hotplug/pciehp_hpc.c
> +++ b/drivers/pci/hotplug/pciehp_hpc.c
> @@ -533,9 +533,11 @@ static irqreturn_t pciehp_isr(int irq, void *dev_id)
> u16 status, events;
>
> /*
> - * Interrupts only occur in D3hot or shallower (PCIe r4.0, sec 6.7.3.4).
> + * Interrupts only occur in D3hot or shallower and only if enabled
> + * in the Slot Control register (PCIe r4.0, sec 6.7.3.4).
> */
> - if (pdev->current_state == PCI_D3cold)
> + if (pdev->current_state == PCI_D3cold ||
> + !(ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE))
> return IRQ_NONE;
>
> /*
Isn't this going to break pciehp_poll_mode?
next prev parent reply other threads:[~2018-09-07 22:45 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-06 15:50 [PATCH 00/10] PCI: Allow D3cold for PCIe hierarchies Mika Westerberg
2018-09-06 15:50 ` [PATCH 01/10] PCI: Do not skip power managed bridges in pci_enable_wake() Mika Westerberg
2018-09-11 8:47 ` Rafael J. Wysocki
2018-09-11 9:09 ` Mika Westerberg
2018-09-06 15:50 ` [PATCH 02/10] PCI / ACPI: Enable wake automatically for power managed bridges Mika Westerberg
2018-09-11 8:50 ` Rafael J. Wysocki
2018-09-06 15:50 ` [PATCH 03/10] PCI: pciehp: Disable hotplug interrupt during suspend Mika Westerberg
2018-09-11 8:55 ` Rafael J. Wysocki
2018-09-06 15:50 ` [PATCH 04/10] PCI: pciehp: Do not handle events if interrupts are masked Mika Westerberg
2018-09-06 16:04 ` Lukas Wunner
2018-09-07 22:45 ` Keith Busch [this message]
2018-09-08 6:16 ` Lukas Wunner
2018-09-10 7:17 ` Mika Westerberg
2018-09-06 15:50 ` [PATCH 05/10] PCI: portdrv: Resume upon exit from system suspend if left runtime suspended Mika Westerberg
2018-09-11 8:00 ` Rafael J. Wysocki
2018-09-11 9:15 ` Mika Westerberg
2018-09-11 10:33 ` Rafael J. Wysocki
2018-09-11 10:41 ` Mika Westerberg
2018-09-11 8:29 ` Lukas Wunner
2018-09-11 9:08 ` Mika Westerberg
2018-09-11 9:26 ` Lukas Wunner
2018-09-11 9:41 ` Mika Westerberg
2018-09-11 9:53 ` Lukas Wunner
2018-09-11 10:23 ` Mika Westerberg
2018-09-06 15:50 ` [PATCH 06/10] PCI: portdrv: Add runtime PM hooks for port service drivers Mika Westerberg
2018-09-11 8:57 ` Rafael J. Wysocki
2018-09-06 15:50 ` [PATCH 07/10] PCI: pciehp: Implement runtime PM callbacks Mika Westerberg
2018-09-11 8:58 ` Rafael J. Wysocki
2018-09-06 15:50 ` [PATCH 08/10] PCI/PME: " Mika Westerberg
2018-09-11 8:59 ` Rafael J. Wysocki
2018-09-06 15:50 ` [PATCH 09/10] ACPI / property: Allow multiple property compatible _DSD entries Mika Westerberg
2018-09-11 9:00 ` Rafael J. Wysocki
2018-09-13 8:00 ` Sakari Ailus
2018-09-06 15:50 ` [PATCH 10/10] PCI / ACPI: Whitelist D3 for more PCIe hotplug ports Mika Westerberg
2018-09-11 9:01 ` Rafael J. Wysocki
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