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[5.150.229.118]) by smtp.gmail.com with ESMTPSA id e5-v6sm2645441ljj.91.2018.12.03.10.02.41 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 03 Dec 2018 10:02:42 -0800 (PST) Date: Mon, 3 Dec 2018 19:02:40 +0100 From: Niklas Cassel To: Marc Zyngier Cc: linux-pci@vger.kernel.org, Lorenzo Pieralisi , Bjorn Helgaas , Trent Piepho , Jingoo Han , Gustavo Pimentel , faiz_abbas@ti.com, Joao Pinto , Vignesh R Subject: Re: [3/3] PCI: designware: Move interrupt acking into the proper callback Message-ID: <20181203180240.GC18985@centauri.lan> References: <20181113225734.8026-4-marc.zyngier@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181113225734.8026-4-marc.zyngier@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Tue, Nov 13, 2018 at 10:57:34PM +0000, Marc Zyngier wrote: > The write to the status register is really an ACK for the HW, > and should be treated as such by the driver. Let's move it to the > irq_ack callback, which will prevent people from moving it around > in order to paper over other bugs. > > Signed-off-by: Marc Zyngier > --- > drivers/pci/controller/dwc/pcie-designware-host.c | 13 +++++++------ > 1 file changed, 7 insertions(+), 6 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c > index 0a76948ed49e..f06e67c60593 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > @@ -99,9 +99,6 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp) > (i * MAX_MSI_IRQS_PER_CTRL) + > pos); > generic_handle_irq(irq); > - dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_STATUS + > - (i * MSI_REG_CTRL_BLOCK_SIZE), > - 4, 1 << pos); > pos++; > } > } > @@ -200,14 +197,18 @@ static void dw_pci_bottom_unmask(struct irq_data *data) > > static void dw_pci_bottom_ack(struct irq_data *d) > { > - struct msi_desc *msi = irq_data_get_msi_desc(d); > - struct pcie_port *pp; > + struct pcie_port *pp = irq_data_get_irq_chip_data(d); > + unsigned int res, bit, ctrl; > unsigned long flags; > > - pp = msi_desc_to_pci_sysdata(msi); > + ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL; > + res = ctrl * MSI_REG_CTRL_BLOCK_SIZE; > + bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL; > > raw_spin_lock_irqsave(&pp->lock, flags); > > + dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_STATUS + res, 4, 1 << bit); > + > if (pp->ops->msi_irq_ack) > pp->ops->msi_irq_ack(d->hwirq, pp); > Tested-by: Niklas Cassel