From: Wolfram Sang <wsa@the-dreams.de>
To: marek.vasut@gmail.com
Cc: linux-pci@vger.kernel.org,
Marek Vasut <marek.vasut+renesas@gmail.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Phil Edworthy <phil.edworthy@renesas.com>,
Simon Horman <horms+renesas@verge.net.au>,
linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH V5 6/6] PCI: rcar: Fix 64bit MSI message address handling
Date: Tue, 2 Apr 2019 08:28:33 +0200 [thread overview]
Message-ID: <20190402062833.GB998@kunai> (raw)
In-Reply-To: <20190402013307.20912-6-marek.vasut@gmail.com>
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On Tue, Apr 02, 2019 at 03:33:07AM +0200, marek.vasut@gmail.com wrote:
> From: Marek Vasut <marek.vasut+renesas@gmail.com>
>
> The MSI message address in the RC address space can be 64 bit. The
> R-Car PCIe RC supports such a 64bit MSI message address as well.
> The code currently uses virt_to_phys(__get_free_pages()) to obtain
> a reserved page for the MSI message address, and the return value
> of which can be a 64 bit physical address on 64 bit system.
>
> However, the driver only programs PCIEMSIALR register with the bottom
> 32 bits of the virt_to_phys(__get_free_pages()) return value and does
> not program the top 32 bits into PCIEMSIAUR, but rather programs the
> PCIEMSIAUR register with 0x0. This worked fine on older 32 bit R-Car
> SoCs, however may fail on new 64 bit R-Car SoCs.
>
> Since from a PCIe controller perspective, an inbound MSI is a memory
> write to a special address (in case of this controller, defined by
> the value in PCIEMSIAUR:PCIEMSIALR), which triggers an interrupt, but
> never hits the DRAM _and_ because allocation of an MSI by a PCIe card
> driver obtains the MSI message address by reading PCIEMSIAUR:PCIEMSIALR
> in rcar_msi_setup_irqs(), incorrectly programmed PCIEMSIAUR cannot
> cause memory corruption or other issues.
>
> There is however the possibility that if virt_to_phys(__get_free_pages())
> returned address above the 32bit boundary _and_ PCIEMSIAUR was programmed
> to 0x0 _and_ if the system had physical RAM at the address matching the
> value of PCIEMSIALR, a PCIe card driver could allocate a buffer with a
> physical address matching the value of PCIEMSIALR and a remote write to
> such a buffer by a PCIe card would trigger a spurious MSI.
Very good descripion!
> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
> Cc: Geert Uytterhoeven <geert+renesas@glider.be>
> Cc: Phil Edworthy <phil.edworthy@renesas.com>
> Cc: Simon Horman <horms+renesas@verge.net.au>
> Cc: Wolfram Sang <wsa@the-dreams.de>
> Cc: linux-renesas-soc@vger.kernel.org
> To: linux-pci@vger.kernel.org
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
I double-checked with the datasheets previously.
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
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next prev parent reply other threads:[~2019-04-02 6:28 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-02 1:33 [PATCH V5 1/6] PCI: rcar: Clean up remaining macros defining bits marek.vasut
2019-04-02 1:33 ` [PATCH V5 2/6] PCI: rcar: Replace unsigned long with u32/unsigned int in register accessors marek.vasut
2019-04-03 9:27 ` Simon Horman
2019-04-02 1:33 ` [PATCH V5 3/6] PCI: rcar: Replace various variable types with unsigned ones for register values marek.vasut
2019-04-02 6:24 ` Wolfram Sang
2019-04-03 9:28 ` Simon Horman
2019-04-02 1:33 ` [PATCH V5 4/6] PCI: rcar: Replace (8 * n) with (BITS_PER_BYTE * n) marek.vasut
2019-04-03 9:27 ` Simon Horman
2019-04-02 1:33 ` [PATCH V5 5/6] PCI: rcar: Clean up debug messages marek.vasut
2019-04-03 9:28 ` Simon Horman
2019-04-02 1:33 ` [PATCH V5 6/6] PCI: rcar: Fix 64bit MSI message address handling marek.vasut
2019-04-02 6:28 ` Wolfram Sang [this message]
2019-04-03 9:29 ` Simon Horman
2019-04-04 9:28 ` Lorenzo Pieralisi
2019-04-04 15:48 ` Marek Vasut
2019-04-04 16:27 ` Lorenzo Pieralisi
2019-04-03 9:27 ` [PATCH V5 1/6] PCI: rcar: Clean up remaining macros defining bits Simon Horman
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