From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
Murali Karicheri <m-karicheri2@ti.com>,
Jingoo Han <jingoohan1@gmail.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-arm-kernel@axis.com,
Minghuan Lian <minghuan.Lian@nxp.com>,
Mingkai Hu <mingkai.hu@nxp.com>, Roy Zang <roy.zang@nxp.com>,
Jesper Nilsson <jesper.nilsson@axis.com>
Subject: Re: [PATCH v3 00/26] Add support for PCIe RC and EP mode in TI's AM654 SoC
Date: Fri, 12 Apr 2019 16:48:36 +0100 [thread overview]
Message-ID: <20190412154836.GB8730@red-moon> (raw)
In-Reply-To: <20190325093947.32633-1-kishon@ti.com>
On Mon, Mar 25, 2019 at 03:09:21PM +0530, Kishon Vijay Abraham I wrote:
> Add PCIe RC support for TI's AM654 SoC. The PCIe controller in AM654
> uses Synopsys core revision 4.90a and uses the same TI wrapper as used
> in keystone2 with certain modification. Hence AM654 will use the same
> pci wrapper driver pci-keystone.c
>
> This series was initially part of [1]. This series only includes patches
> that has to be merged via Lorenzo's tree. The PHY patches and dt patches
> will be sent separately.
>
> This series is created over keystone MSI cleanup series [2].
>
> This series:
> *) Cleanup pci-keystone driver so that both RC mode and EP mode of
> AM654 can be supported
> *) Modify epc-core to support allocation of aligned buffers required for
> AM654
> *) Fix ATU unroll identification
> *) Add support for both host mode and device mode in AM654
>
> Changes from v2:
> *) Missed updating "Reviewed-by: Rob Herring <robh@kernel.org>" tags
> in the version that was sent to list.
> *) Add const qualifier to struct dw_pcie_ep_ops in pci-layerscape-ep.c
>
> Changes from v1:
> *) Support for legacy interrupt in AM654 is removed (see background here
> [3])
> *) Allow of_pci_get_max_link_speed to be used by Endpoint controller
> driver
> *) Add support to set max-link-speed from DT in pci-keystone driver
> *) Update "Reviewed-by: Rob Herring <robh@kernel.org>" tags.
>
> [1] -> https://lore.kernel.org/patchwork/cover/989487/
> [2] -> https://lkml.org/lkml/2019/3/21/193
> [3] -> https://lkml.org/lkml/2019/3/19/235
>
> Kishon Vijay Abraham I (26):
> PCI: keystone: Add start_link/stop_link dw_pcie_ops
> PCI: keystone: Cleanup error_irq configuration
> dt-bindings: PCI: keystone: Add "reg-names" binding information
> PCI: keystone: Perform host initialization in a single function
> PCI: keystone: Use platform_get_resource_byname to get memory
> resources
> PCI: keystone: Move initializations to appropriate places
> dt-bindings: PCI: Add dt-binding to configure PCIe mode
> PCI: keystone: Explicitly set the PCIe mode
> dt-bindings: PCI: Document "atu" reg-names
> PCI: dwc: Enable iATU unroll for endpoint too
> PCI: dwc: Fix ATU identification for designware version >= 4.80
> PCI: keystone: Prevent ARM32 specific code to be compiled for ARM64
> dt-bindings: PCI: Add PCI RC dt binding documentation for AM654
> PCI: keystone: Add support for PCIe RC in AM654x Platforms
> PCI: keystone: Invoke phy_reset API before enabling PHY
> PCI: OF: Allow of_pci_get_max_link_speed() to be used by PCI Endpoint
> drivers
> PCI: keystone: Add support to set the max link speed from DT
> PCI: endpoint: Add support to allocate aligned buffers to be mapped in
> BARs
> PCI: dwc: Add const qualifier to struct dw_pcie_ep_ops
> PCI: dwc: Fix dw_pcie_ep_find_capability to return correct capability
> offset
> PCI: dwc: Add callbacks for accessing dbi2 address space
> PCI: keystone: Add support for PCIe EP in AM654x Platforms
> PCI: designware-ep: Configure RESBAR to advertise the smallest size
> PCI: designware-ep: Use aligned ATU window for raising MSI interrupts
> misc: pci_endpoint_test: Add support to test PCI EP in AM654x
> misc: pci_endpoint_test: Fix test_reg_bar to be updated in
> pci_endpoint_test
>
> .../bindings/pci/designware-pcie.txt | 7 +-
> .../devicetree/bindings/pci/pci-keystone.txt | 14 +-
> drivers/misc/pci_endpoint_test.c | 18 +
> drivers/pci/Makefile | 2 +-
> drivers/pci/controller/dwc/Kconfig | 25 +-
> drivers/pci/controller/dwc/pci-dra7xx.c | 2 +-
> drivers/pci/controller/dwc/pci-keystone.c | 577 +++++++++++++++---
> .../pci/controller/dwc/pci-layerscape-ep.c | 2 +-
> drivers/pci/controller/dwc/pcie-artpec6.c | 2 +-
> .../pci/controller/dwc/pcie-designware-ep.c | 55 +-
> .../pci/controller/dwc/pcie-designware-host.c | 19 -
> .../pci/controller/dwc/pcie-designware-plat.c | 2 +-
> drivers/pci/controller/dwc/pcie-designware.c | 52 ++
> drivers/pci/controller/dwc/pcie-designware.h | 15 +-
> drivers/pci/endpoint/functions/pci-epf-test.c | 5 +-
> drivers/pci/endpoint/pci-epf-core.c | 10 +-
> drivers/pci/of.c | 44 +-
> include/linux/pci-epc.h | 2 +
> include/linux/pci-epf.h | 3 +-
> 19 files changed, 683 insertions(+), 173 deletions(-)
Hi Kishon,
I have applied the series, after rewriting the commit logs we
discussed, branch: pci/keystone, please have a look and let me know
if that's good to go.
Thanks,
Lorenzo
next prev parent reply other threads:[~2019-04-12 15:48 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-25 9:39 [PATCH v3 00/26] Add support for PCIe RC and EP mode in TI's AM654 SoC Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 01/26] PCI: keystone: Add start_link/stop_link dw_pcie_ops Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 02/26] PCI: keystone: Cleanup error_irq configuration Kishon Vijay Abraham I
2019-04-13 14:03 ` Bjorn Helgaas
2019-04-15 5:28 ` Kishon Vijay Abraham I
2019-04-13 14:07 ` Bjorn Helgaas
2019-03-25 9:39 ` [PATCH v3 03/26] dt-bindings: PCI: keystone: Add "reg-names" binding information Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 04/26] PCI: keystone: Perform host initialization in a single function Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 05/26] PCI: keystone: Use platform_get_resource_byname to get memory resources Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 06/26] PCI: keystone: Move initializations to appropriate places Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 07/26] dt-bindings: PCI: Add dt-binding to configure PCIe mode Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 08/26] PCI: keystone: Explicitly set the " Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 09/26] dt-bindings: PCI: Document "atu" reg-names Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 10/26] PCI: dwc: Enable iATU unroll for endpoint too Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 11/26] PCI: dwc: Fix ATU identification for designware version >= 4.80 Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 12/26] PCI: keystone: Prevent ARM32 specific code to be compiled for ARM64 Kishon Vijay Abraham I
2019-04-11 15:03 ` Lorenzo Pieralisi
2019-04-12 8:50 ` Kishon Vijay Abraham I
2019-04-12 9:31 ` Russell King - ARM Linux admin
2019-04-12 11:02 ` Kishon Vijay Abraham I
2019-04-12 11:11 ` Lorenzo Pieralisi
2019-04-12 11:29 ` Kishon Vijay Abraham I
2019-04-12 11:48 ` Lorenzo Pieralisi
2019-03-25 9:39 ` [PATCH v3 13/26] dt-bindings: PCI: Add PCI RC dt binding documentation for AM654 Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 14/26] PCI: keystone: Add support for PCIe RC in AM654x Platforms Kishon Vijay Abraham I
2019-04-13 15:26 ` Bjorn Helgaas
2019-04-16 14:15 ` Lorenzo Pieralisi
2019-04-17 13:06 ` Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 15/26] PCI: keystone: Invoke phy_reset API before enabling PHY Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 16/26] PCI: OF: Allow of_pci_get_max_link_speed() to be used by PCI Endpoint drivers Kishon Vijay Abraham I
2019-04-11 15:00 ` Lorenzo Pieralisi
2019-04-12 14:05 ` Bjorn Helgaas
2019-03-25 9:39 ` [PATCH v3 17/26] PCI: keystone: Add support to set the max link speed from DT Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 18/26] PCI: endpoint: Add support to allocate aligned buffers to be mapped in BARs Kishon Vijay Abraham I
2019-04-11 15:32 ` Lorenzo Pieralisi
2019-04-12 10:37 ` Kishon Vijay Abraham I
2019-04-12 10:55 ` Lorenzo Pieralisi
2019-03-25 9:39 ` [PATCH v3 19/26] PCI: dwc: Add const qualifier to struct dw_pcie_ep_ops Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 20/26] PCI: dwc: Fix dw_pcie_ep_find_capability to return correct capability offset Kishon Vijay Abraham I
2019-04-13 15:44 ` Bjorn Helgaas
2019-04-16 14:11 ` Lorenzo Pieralisi
2019-03-25 9:39 ` [PATCH v3 21/26] PCI: dwc: Add callbacks for accessing dbi2 address space Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 22/26] PCI: keystone: Add support for PCIe EP in AM654x Platforms Kishon Vijay Abraham I
2019-04-26 9:40 ` Lorenzo Pieralisi
2019-04-26 12:41 ` Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 23/26] PCI: designware-ep: Configure RESBAR to advertise the smallest size Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 24/26] PCI: designware-ep: Use aligned ATU window for raising MSI interrupts Kishon Vijay Abraham I
2019-04-13 15:58 ` Bjorn Helgaas
2019-03-25 9:39 ` [PATCH v3 25/26] misc: pci_endpoint_test: Add support to test PCI EP in AM654x Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 26/26] misc: pci_endpoint_test: Fix test_reg_bar to be updated in pci_endpoint_test Kishon Vijay Abraham I
2019-04-12 15:48 ` Lorenzo Pieralisi [this message]
2019-04-13 16:04 ` [PATCH v3 00/26] Add support for PCIe RC and EP mode in TI's AM654 SoC Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190412154836.GB8730@red-moon \
--to=lorenzo.pieralisi@arm.com \
--cc=arnd@arndb.de \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=gustavo.pimentel@synopsys.com \
--cc=jesper.nilsson@axis.com \
--cc=jingoohan1@gmail.com \
--cc=kishon@ti.com \
--cc=linux-arm-kernel@axis.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-omap@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=m-karicheri2@ti.com \
--cc=minghuan.Lian@nxp.com \
--cc=mingkai.hu@nxp.com \
--cc=robh+dt@kernel.org \
--cc=roy.zang@nxp.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).