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From: Bjorn Helgaas <helgaas@kernel.org>
To: Alexander Fomichev <fomichev.ru@gmail.com>
Cc: linux-pci@vger.kernel.org, linux@yadro.com
Subject: Re: [PATCH RESEND] PCI: disable runtime PM for PLX switches
Date: Mon, 15 Apr 2019 09:15:54 -0500	[thread overview]
Message-ID: <20190415141554.GL126710@google.com> (raw)
In-Reply-To: <20190415135903.wiyw34faiezdnbbs@yadro.com>

This says it's a resend, but I don't see a previous posting; maybe it was
HTML and rejected by the mailing list?

On Mon, Apr 15, 2019 at 04:59:03PM +0300, Alexander Fomichev wrote:
> PLX switches have an issue that their internal registers become inaccessible
> when runtime PM is enabled. Therefore PLX service tools can't communicate
> with the hardware. A kernel option "pcie_port_pm=off" can be used as a
> workaround. But it affects all the devices.
> So this solution is to add PLX switch devices to the quirk list for
> disabling runtime PM only for them.

I assume the problem is actually that the config space registers are
inaccessible when the device is in D3hot?

I think config space access is supposed to work when a device is in D3hot
(see PCIe r4.0, sec 5.3.1.4).

If it doesn't work, wouldn't that mean that we couldn't even bring the
device *out* of D3hot, since that requires a config write?

If this is really the problem, it'd be nice to identify this specifically
instead of piggy-backing on the "is_hotplug_bridge" thing, which might be
coincidentally related, but also carries other meanings.

> ---
>  drivers/pci/quirks.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index a59ad09..8ea99aa 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -2923,6 +2923,17 @@ static void quirk_hotplug_bridge(struct pci_dev *dev)
>  	dev->is_hotplug_bridge = 1;
>  }
>  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HINT, 0x0020, quirk_hotplug_bridge);
> +/*
> + * Disable runtime PM for PLX Draco (1,2), Capella (1,2) series PCIe switches
> + * to prevent service tools from failing to access hardware registers.
> + */
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x8712, quirk_hotplug_bridge);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x8733, quirk_hotplug_bridge);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x8734, quirk_hotplug_bridge);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x8780, quirk_hotplug_bridge);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x8796, quirk_hotplug_bridge);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x9781, quirk_hotplug_bridge);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x9797, quirk_hotplug_bridge);
>  
>  /*
>   * This is a quirk for the Ricoh MMC controller found as a part of some
> -- 
> 2.7.4

  reply	other threads:[~2019-04-15 14:15 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-15 13:59 [PATCH RESEND] PCI: disable runtime PM for PLX switches Alexander Fomichev
2019-04-15 14:15 ` Bjorn Helgaas [this message]
2019-04-23 21:53   ` Bjorn Helgaas
2019-04-24 10:01     ` Alexander Fomichev
2019-04-24 14:11       ` Bjorn Helgaas
2019-04-24 14:58         ` Mika Westerberg
2019-04-24 17:21           ` Bjorn Helgaas
2019-04-24 21:09             ` Rafael J. Wysocki
2019-06-27 11:06               ` Alexander Fomichev
2019-07-17 21:42                 ` Bjorn Helgaas
2019-07-18  8:35                   ` Rafael J. Wysocki
2019-04-24 16:01         ` Logan Gunthorpe

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