From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E675C10F14 for ; Tue, 23 Apr 2019 08:29:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5B02621738 for ; Tue, 23 Apr 2019 08:29:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="I2rrB3zZ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727247AbfDWI3f (ORCPT ); Tue, 23 Apr 2019 04:29:35 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:3532 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726710AbfDWI3e (ORCPT ); Tue, 23 Apr 2019 04:29:34 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 23 Apr 2019 01:29:40 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 23 Apr 2019 01:29:34 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 23 Apr 2019 01:29:34 -0700 Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 23 Apr 2019 08:29:33 +0000 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 23 Apr 2019 08:29:33 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Tue, 23 Apr 2019 08:29:33 +0000 Received: from vidyas-desktop.nvidia.com (Not Verified[10.24.37.38]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 23 Apr 2019 01:29:33 -0700 From: Vidya Sagar To: , , , , , , , , , , CC: , , , , , , , , , Subject: [PATCH V4 16/16] arm64: Add Tegra194 PCIe driver to defconfig Date: Tue, 23 Apr 2019 13:57:30 +0530 Message-ID: <20190423082730.370-17-vidyas@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190423082730.370-1-vidyas@nvidia.com> References: <20190423082730.370-1-vidyas@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1556008180; bh=69fZdzygmNUj/g73l6ugYICL5QOz5Sf9kGAZWu402Eo=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=I2rrB3zZpeIo4s6nrJ1O6fazCYCIHjJsAJIuGpl1DcxlIHL21zXOyf2vESy4tC01D ekUIBp80P2cVbDkdC3P59DrkU+Gmgf3P0ZfzqWZT5E+W+GcJOCWmkoz9RH1leeq074 JqLS2jhe3BKcf/iS5DJbwZBzVQ+ls5CXsvpk4Qh71H8TxG9d+OeAQD1wA1e+7H9bmu a5bvzy+8izOVweuWuvcGrnvgFmsarHqEzPd/BHZkKlBg03EJC6l+MVqpGpjBEb/uOL 1uQ95c5reyh3a8hQnKO9WCU7xi12g123a7vxJzQ1GMymTWZy38IYNGLI6sZqUzP+yS zBZf1gYHi1EQw== Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add PCIe host controller driver for DesignWare core based PCIe controller IP present in Tegra194. Signed-off-by: Vidya Sagar --- Changes since [v3]: * None Changes since [v2]: * None Changes since [v1]: * Changed CONFIG_PCIE_TEGRA194 from 'y' to 'm' arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 17daa971225e..72cf77c58e7c 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -87,6 +87,7 @@ CONFIG_PCIE_QCOM=y CONFIG_PCIE_ARMADA_8K=y CONFIG_PCIE_KIRIN=y CONFIG_PCIE_HISI_STB=y +CONFIG_PCIE_TEGRA194=m CONFIG_ARM64_VA_BITS_48=y CONFIG_SCHED_MC=y CONFIG_NUMA=y -- 2.17.1