From: Thierry Reding <thierry.reding@gmail.com>
To: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Cc: bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com,
jonathanh@nvidia.com, lorenzo.pieralisi@arm.com,
vidyas@nvidia.com, linux-tegra@vger.kernel.org,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH V2 27/28] PCI: tegra: Add support for GPIO based PCIe reset
Date: Thu, 9 May 2019 16:45:28 +0200 [thread overview]
Message-ID: <20190509144528.GX8907@ulmo> (raw)
In-Reply-To: <20190423092825.759-28-mmaddireddy@nvidia.com>
[-- Attachment #1: Type: text/plain, Size: 3413 bytes --]
On Tue, Apr 23, 2019 at 02:58:24PM +0530, Manikanta Maddireddy wrote:
> Add support for GPIO based PERST# instead of SFIO mode controlled by AFI.
> GPIO number comes from per port PCIe device tree node.
>
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> ---
> V2: Using standard "reset-gpio" property
>
> drivers/pci/controller/pci-tegra.c | 36 +++++++++++++++++++++++++-----
> 1 file changed, 30 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
> index 72d344858e25..09b3b3e847c5 100644
> --- a/drivers/pci/controller/pci-tegra.c
> +++ b/drivers/pci/controller/pci-tegra.c
> @@ -17,6 +17,7 @@
> #include <linux/debugfs.h>
> #include <linux/delay.h>
> #include <linux/export.h>
> +#include <linux/gpio.h>
> #include <linux/interrupt.h>
> #include <linux/iopoll.h>
> #include <linux/irq.h>
> @@ -26,6 +27,7 @@
> #include <linux/module.h>
> #include <linux/msi.h>
> #include <linux/of_address.h>
> +#include <linux/of_gpio.h>
> #include <linux/of_pci.h>
> #include <linux/of_platform.h>
> #include <linux/pci.h>
> @@ -400,6 +402,8 @@ struct tegra_pcie_port {
> unsigned int lanes;
>
> struct phy **phys;
> +
> + int reset_gpio;
Please store the struct gpio_desc * here.
> };
>
> struct tegra_pcie_bus {
> @@ -583,15 +587,23 @@ static void tegra_pcie_port_reset(struct tegra_pcie_port *port)
> unsigned long value;
>
> /* pulse reset signal */
> - value = afi_readl(port->pcie, ctrl);
> - value &= ~AFI_PEX_CTRL_RST;
> - afi_writel(port->pcie, value, ctrl);
> + if (gpio_is_valid(port->reset_gpio)) {
> + gpiod_set_value(gpio_to_desc(port->reset_gpio), 0);
Then there's no need for the conversion between the integer and the
descriptor.
> + } else {
> + value = afi_readl(port->pcie, ctrl);
> + value &= ~AFI_PEX_CTRL_RST;
> + afi_writel(port->pcie, value, ctrl);
> + }
>
> usleep_range(1000, 2000);
>
> - value = afi_readl(port->pcie, ctrl);
> - value |= AFI_PEX_CTRL_RST;
> - afi_writel(port->pcie, value, ctrl);
> + if (gpio_is_valid(port->reset_gpio)) {
> + gpiod_set_value(gpio_to_desc(port->reset_gpio), 1);
> + } else {
> + value = afi_readl(port->pcie, ctrl);
> + value |= AFI_PEX_CTRL_RST;
> + afi_writel(port->pcie, value, ctrl);
> + }
> }
>
> static void tegra_pcie_enable_rp_features(struct tegra_pcie_port *port)
> @@ -2299,6 +2311,18 @@ static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
> if (IS_ERR(rp->base))
> return PTR_ERR(rp->base);
>
> + rp->reset_gpio = of_get_named_gpio(port, "reset-gpio", 0);
You can use devm_gpiod_get_from_of_node() to achieve this. Also, that
function allows you to pass in flags, so you no longer need the below
extra step to configure the GPIO.
> + if (gpio_is_valid(rp->reset_gpio)) {
> + err = devm_gpio_request_one(dev, rp->reset_gpio,
> + GPIOF_OUT_INIT_LOW,
> + "pex_reset");
Perhaps we want to include the port in the label somehow?
> + if (err < 0) {
> + dev_err(dev, "failed to request reset-gpio: %d\n",
Something like the below would be more consistent with the rest of the
driver:
"failed to request reset GPIO: %d\n"
Thierry
> + err);
> + return err;
> + }
> + }
> +
> list_add_tail(&rp->list, &pcie->ports);
> }
>
> --
> 2.17.1
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
next prev parent reply other threads:[~2019-05-09 14:45 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-23 9:27 [PATCH V2 00/28] Enable Tegra PCIe root port features Manikanta Maddireddy
2019-04-23 9:27 ` [PATCH V2 01/28] soc/tegra: pmc: Export tegra_powergate_power_on() Manikanta Maddireddy
2019-05-09 14:02 ` Thierry Reding
2019-04-23 9:27 ` [PATCH V2 02/28] PCI: tegra: Handle failure cases in tegra_pcie_power_on() Manikanta Maddireddy
2019-05-09 14:04 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 03/28] PCI: tegra: Rearrange Tegra PCIe driver functions Manikanta Maddireddy
2019-05-09 14:05 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 04/28] PCI: tegra: Disable PCIe interrupts in runtime suspend Manikanta Maddireddy
2019-05-09 14:10 ` Thierry Reding
2019-05-09 15:57 ` Manikanta Maddireddy
2019-04-23 9:28 ` [PATCH V2 05/28] PCI: tegra: Fix PCIe host power up sequence Manikanta Maddireddy
2019-05-09 14:14 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 06/28] PCI: tegra: Add PCIe Gen2 link speed support Manikanta Maddireddy
2019-05-09 14:17 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 07/28] PCI: tegra: Advertise PCIe Advanced Error Reporting (AER) capability Manikanta Maddireddy
2019-05-09 14:17 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 08/28] PCI: tegra: Program UPHY electrical settings for Tegra210 Manikanta Maddireddy
2019-05-09 14:18 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 09/28] PCI: tegra: Enable opportunistic UpdateFC and ACK Manikanta Maddireddy
2019-04-23 9:28 ` [PATCH V2 10/28] PCI: tegra: Disable AFI dynamic clock gating Manikanta Maddireddy
2019-04-23 9:28 ` [PATCH V2 11/28] PCI: tegra: Process pending DLL transactions before entering L1 or L2 Manikanta Maddireddy
2019-04-23 9:28 ` [PATCH V2 12/28] PCI: tegra: Enable PCIe xclk clock clamping Manikanta Maddireddy
2019-05-09 14:20 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 13/28] PCI: tegra: Increase the deskew retry time Manikanta Maddireddy
2019-05-09 14:20 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 14/28] PCI: tegra: Add SW fixup for RAW violations Manikanta Maddireddy
2019-05-09 14:21 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 15/28] PCI: tegra: Update flow control timer frequency in Tegra210 Manikanta Maddireddy
2019-05-09 14:22 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 16/28] PCI: tegra: Set target speed as Gen1 before starting LTSSM Manikanta Maddireddy
2019-05-09 14:23 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 17/28] PCI: tegra: Fix PLLE power down issue due to CLKREQ# signal Manikanta Maddireddy
2019-05-09 14:24 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 18/28] PCI: tegra: Program AFI_CACHE* registers only for Tegra20 Manikanta Maddireddy
2019-04-26 15:32 ` Thierry Reding
2019-04-29 9:30 ` Manikanta Maddireddy
2019-05-09 14:25 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 19/28] PCI: tegra: Change PRSNT_SENSE irq log to debug Manikanta Maddireddy
2019-05-09 14:27 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 20/28] PCI: tegra: Use legacy irq for port service drivers Manikanta Maddireddy
2019-05-09 14:29 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 21/28] PCI: tegra: Add AFI_PEX2_CTRL reg offset as part of soc struct Manikanta Maddireddy
2019-04-23 9:28 ` [PATCH V2 22/28] PCI: tegra: Access endpoint config only if PCIe link is up Manikanta Maddireddy
2019-04-23 20:24 ` Bjorn Helgaas
2019-04-24 3:51 ` Manikanta Maddireddy
2019-05-09 14:34 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 23/28] dt-bindings: pci: tegra: Document PCIe DPD pinctrl optional prop Manikanta Maddireddy
2019-05-01 19:52 ` Rob Herring
2019-05-09 14:34 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 24/28] arm64: tegra: Add PEX DPD states as pinctrl properties Manikanta Maddireddy
2019-05-09 14:38 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 25/28] PCI: tegra: Put PEX CLK & BIAS pads in DPD mode Manikanta Maddireddy
2019-05-09 14:35 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 26/28] dt-bindings: pci: tegra: Document reset-gpio optional prop Manikanta Maddireddy
2019-05-01 19:58 ` Rob Herring
2019-05-09 14:37 ` Thierry Reding
2019-05-09 14:37 ` Thierry Reding
2019-04-23 9:28 ` [PATCH V2 27/28] PCI: tegra: Add support for GPIO based PCIe reset Manikanta Maddireddy
2019-05-09 14:45 ` Thierry Reding [this message]
2019-04-23 9:28 ` [PATCH V2 28/28] PCI: tegra: Change link retry log level to info Manikanta Maddireddy
2019-05-09 14:47 ` Thierry Reding
2019-04-26 13:22 ` [PATCH V2 00/28] Enable Tegra PCIe root port features Thierry Reding
2019-05-01 11:13 ` Lorenzo Pieralisi
2019-05-01 11:43 ` Manikanta Maddireddy
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190509144528.GX8907@ulmo \
--to=thierry.reding@gmail.com \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=jonathanh@nvidia.com \
--cc=linux-pci@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mark.rutland@arm.com \
--cc=mmaddireddy@nvidia.com \
--cc=robh+dt@kernel.org \
--cc=vidyas@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).