From: Alex Williamson <alex.williamson@redhat.com>
To: Maik Broemme <mbroemme@libmpq.org>
Cc: linux-pci <linux-pci@vger.kernel.org>,
vfio-users <vfio-users@redhat.com>
Subject: Re: [PATCH] PCI: Mark Intel bridge on SuperMicro Atom C3xxx motherboards to avoid bus reset
Date: Fri, 24 May 2019 10:40:03 -0600 [thread overview]
Message-ID: <20190524104003.2f7f1363@x1.home> (raw)
In-Reply-To: <20190524153118.GA12862@libmpq.org>
On Fri, 24 May 2019 17:31:18 +0200
Maik Broemme <mbroemme@libmpq.org> wrote:
> The Intel PCI bridge on SuperMicro Atom C3xxx motherboards do not
> successfully complete a bus reset when used with certain child devices.
What are these 'certain child devices'? We can't really regression
test to know if/when the problem might be resolved if we don't know
what to test. Do these devices reset properly in other systems? Are
there any devices that can do a bus reset properly on this system? We'd
really only want to blacklist bus reset on this root port(?) if this is
a systemic problem with the root port, which is not clearly proven
here. Thanks,
Alex
> After the reset, config accesses to the child may fail. If assigning
> such device via VFIO it will immediately fail with:
>
> vfio-pci 0000:01:00.0: Failed to return from FLR
> vfio-pci 0000:01:00.0: timed out waiting for pending transaction;
> performing function level reset anyway
>
> Device will disappear from PCI device list:
>
> !!! Unknown header type 7f
> Kernel driver in use: vfio-pci
> Kernel modules: ddbridge
>
> The attached patch will mark the root port as incapable of doing a
> bus level reset. After that all my tested devices survive a VFIO
> assignment and several VM reboot cycles.
>
> Signed-off-by: Maik Broemme <mbroemme@libmpq.org>
> ---
> drivers/pci/quirks.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 0f16acc323c6..86cd42872708 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -3433,6 +3433,13 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034, quirk_no_bus_reset);
> */
> DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CAVIUM, 0xa100, quirk_no_bus_reset);
>
> +/*
> + * Root port on some SuperMicro Atom C3xxx motherboards do not successfully
> + * complete a bus reset when used with certain child devices. After the
> + * reset, config accesses to the child may fail.
> + */
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x19a4, quirk_no_bus_reset);
> +
> static void quirk_no_pm_reset(struct pci_dev *dev)
> {
> /*
next prev parent reply other threads:[~2019-05-24 16:40 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-24 15:31 [PATCH] PCI: Mark Intel bridge on SuperMicro Atom C3xxx motherboards to avoid bus reset Maik Broemme
2019-05-24 16:40 ` Alex Williamson [this message]
2019-05-24 18:41 ` Maik Broemme
2019-05-29 22:03 ` Bjorn Helgaas
2019-05-30 1:49 ` Alex Williamson
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