From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D57EC31E50 for ; Sun, 16 Jun 2019 20:04:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0DDAD20657 for ; Sun, 16 Jun 2019 20:04:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727394AbfFPUEz (ORCPT ); Sun, 16 Jun 2019 16:04:55 -0400 Received: from mail-qk1-f196.google.com ([209.85.222.196]:45558 "EHLO mail-qk1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727211AbfFPUEz (ORCPT ); Sun, 16 Jun 2019 16:04:55 -0400 Received: by mail-qk1-f196.google.com with SMTP id s22so4964256qkj.12 for ; Sun, 16 Jun 2019 13:04:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=MSqaCoMGco6P2zrSK37/hWJH9CXgQkBw2hzb1U1jzNw=; b=ArbvyylwpEx3nXGN2LFw79zVS27pUc7IYLsCsTBSOcvzO1R6z/T0iC4xOtJzB2a4QJ hUjy7CWgY64wttqVCIYOpIrXBYaBnob/IUXD5JAxsxaO2b+Hh9O/CZ/c+HmZGAEzuCAl Ly/LkWWjOysOwOu9oOE2KvWiCZNojZXBy3n5LAZM5pL35uMJl3doeTsPK5DL7n4nppWz AxZUha8rPJTjUYdfQa3XAAl+acuT0bEaFWORc/fB/SGDCEp1tmgN/u4yyraAYufRkPPW /AALkKo98HUuZRpe6GjHE6rendFOTjwLgPGWRsxDSicwlcVJTu2HRISSkmb6JTvyJmM6 6LzQ== X-Gm-Message-State: APjAAAX3EfYvwxvEu2Pgn4N2vid9QRGDaqE8yem+U8vJ1YCah2xyAydJ rmNqJRyPpUixCCmLVdQ5yfhX/g== X-Google-Smtp-Source: APXvYqzk8vjSAyBVM9AEC2sCcZJe/bhI9soeo5hRV28lwc5eEPs3dYN+S5Bd7YkUw5B0eEUJ+IVZrA== X-Received: by 2002:ae9:c21a:: with SMTP id j26mr65498831qkg.310.1560715494165; Sun, 16 Jun 2019 13:04:54 -0700 (PDT) Received: from redhat.com (pool-100-0-197-103.bstnma.fios.verizon.net. [100.0.197.103]) by smtp.gmail.com with ESMTPSA id w51sm4943466qth.18.2019.06.16.13.04.51 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Sun, 16 Jun 2019 13:04:53 -0700 (PDT) Date: Sun, 16 Jun 2019 16:04:49 -0400 From: "Michael S. Tsirkin" To: Jean-Philippe Brucker Cc: "joro@8bytes.org" , "iommu@lists.linux-foundation.org" , "linux-pci@vger.kernel.org" , "devicetree@vger.kernel.org" , "virtualization@lists.linux-foundation.org" , "virtio-dev@lists.oasis-open.org" , "jasowang@redhat.com" , "robh+dt@kernel.org" , Mark Rutland , Lorenzo Pieralisi , Robin Murphy , "bhelgaas@google.com" , "frowand.list@gmail.com" , "kvmarm@lists.cs.columbia.edu" , "eric.auger@redhat.com" , "tnowicki@caviumnetworks.com" , "kevin.tian@intel.com" , "bauerman@linux.ibm.com" Subject: Re: [virtio-dev] Re: [PATCH v8 2/7] dt-bindings: virtio: Add virtio-pci-iommu node Message-ID: <20190616154841-mutt-send-email-mst@kernel.org> References: <20190530170929.19366-1-jean-philippe.brucker@arm.com> <20190530170929.19366-3-jean-philippe.brucker@arm.com> <20190530133523-mutt-send-email-mst@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Fri, May 31, 2019 at 12:13:47PM +0100, Jean-Philippe Brucker wrote: > On 30/05/2019 18:45, Michael S. Tsirkin wrote: > > On Thu, May 30, 2019 at 06:09:24PM +0100, Jean-Philippe Brucker wrote: > >> Some systems implement virtio-iommu as a PCI endpoint. The operating > >> system needs to discover the relationship between IOMMU and masters long > >> before the PCI endpoint gets probed. Add a PCI child node to describe the > >> virtio-iommu device. > >> > >> The virtio-pci-iommu is conceptually split between a PCI programming > >> interface and a translation component on the parent bus. The latter > >> doesn't have a node in the device tree. The virtio-pci-iommu node > >> describes both, by linking the PCI endpoint to "iommus" property of DMA > >> master nodes and to "iommu-map" properties of bus nodes. > >> > >> Reviewed-by: Rob Herring > >> Reviewed-by: Eric Auger > >> Signed-off-by: Jean-Philippe Brucker > > > > So this is just an example right? > > We are not defining any new properties or anything like that. > > Yes it's just an example. The properties already exist but it's good to > describe how to put them together for this particular case, because > there isn't a precedent describing the topology for an IOMMU that > appears on the PCI bus. > > > I think down the road for non dt platforms we want to put this > > info in the config space of the device. I do not think ACPI > > is the best option for this since not all systems have it. > > But that can wait. > > There is the probe order problem - PCI needs this info before starting > to probe devices on the bus. This isn't all that special - it's pretty common for IOMMUs to be pci devices. The solution is to have the device on bus 0. For example, add it with DECLARE_PCI_FIXUP_EARLY or DECLARE_PCI_FIXUP_CLASS_EARLY in e.g. arch/x86/kernel/quirks.c or drivers/pci/quirks.c You can also use the configuration access capability if there's need to access the device before its memory is enabled. > Maybe we could store the info in a separate > memory region, that is referenced on the command-line and that the guest > can read early. > > Thanks, > Jean The point is to avoid command line hacks. Devices should be self describing. -- MST