From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_MUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74578C48BD6 for ; Wed, 26 Jun 2019 17:52:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4A9F821743 for ; Wed, 26 Jun 2019 17:52:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1561571521; bh=Sca4Z3OaKtXYUI/5YyPbiGGtd0DSIOE2gztWP1tFwRg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=ejUT/QG5H98WNfuGDK+doLq3A6UlnjPHwqfTboXwKEX5J6JEvQ/XZAil2L4k+J6TZ xbBAfNUF7NBF8XtSPLCoaquxl5DwPL11FuOhURYGNDXUHm10H7R8tMyXDsvPQdnV0s 4irxlApOOfIFV5A50cKcUZlkZVHqkNY+GNmUXqnQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726807AbfFZRv4 (ORCPT ); Wed, 26 Jun 2019 13:51:56 -0400 Received: from mail.kernel.org ([198.145.29.99]:45390 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726796AbfFZRvz (ORCPT ); Wed, 26 Jun 2019 13:51:55 -0400 Received: from localhost (c-67-164-175-55.hsd1.co.comcast.net [67.164.175.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B046B216FD; Wed, 26 Jun 2019 17:51:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1561571514; bh=Sca4Z3OaKtXYUI/5YyPbiGGtd0DSIOE2gztWP1tFwRg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=LZnYzW45b3DGtb+CSPIw9lW7eg1jZASAqQPgdDRKfJ/J8WWC8+6IG/TKWE9KqQEdV 1qvhJ3wa+JEDaYDwsmK2m9ViNBpE+a6nXrW7LmK++vw19GHOw3SzLOY98opv9FCoEH 8lOrIL5bqyp5EksDA0XqzgVxiLhcPXvGcyMNLcNo= Date: Wed, 26 Jun 2019 12:51:53 -0500 From: Bjorn Helgaas To: Xiaowei Bao Cc: robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, leoyang.li@nxp.com, kishon@ti.com, lorenzo.pieralisi@arm.com, arnd@arndb.de, gregkh@linuxfoundation.org, minghuan.Lian@nxp.com, mingkai.hu@nxp.com, roy.zang@nxp.com, kstewart@linuxfoundation.org, pombredanne@nexb.com, shawn.lin@rock-chips.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are compiled separately Message-ID: <20190626175153.GC103694@google.com> References: <20190626111139.32878-1-xiaowei.bao@nxp.com> <20190626111139.32878-2-xiaowei.bao@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190626111139.32878-2-xiaowei.bao@nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org If you post another revision for any reason, please change the subject so it's worded as a command and mentions the new config options, e.g., PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC separately On Wed, Jun 26, 2019 at 07:11:39PM +0800, Xiaowei Bao wrote: > Compile the EP and RC drivers separately with different configuration > options, this looks clearer. > > Signed-off-by: Xiaowei Bao > --- > v2: > - No change. > > drivers/pci/controller/dwc/Kconfig | 20 ++++++++++++++++++-- > drivers/pci/controller/dwc/Makefile | 3 ++- > 2 files changed, 20 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig > index a6ce1ee..a41ccf5 100644 > --- a/drivers/pci/controller/dwc/Kconfig > +++ b/drivers/pci/controller/dwc/Kconfig > @@ -131,13 +131,29 @@ config PCI_KEYSTONE_EP > DesignWare core functions to implement the driver. > > config PCI_LAYERSCAPE > - bool "Freescale Layerscape PCIe controller" > + bool "Freescale Layerscape PCIe controller - Host mode" > depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > depends on PCI_MSI_IRQ_DOMAIN > select MFD_SYSCON > select PCIE_DW_HOST > help > - Say Y here if you want PCIe controller support on Layerscape SoCs. > + Say Y here if you want to enable PCIe controller support on Layerscape > + SoCs to work in Host mode. > + This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] > + determines which PCIe controller works in EP mode and which PCIe > + controller works in RC mode. > + > +config PCI_LAYERSCAPE_EP > + bool "Freescale Layerscape PCIe controller - Endpoint mode" > + depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > + depends on PCI_ENDPOINT > + select PCIE_DW_EP > + help > + Say Y here if you want to enable PCIe controller support on Layerscape > + SoCs to work in Endpoint mode. > + This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] > + determines which PCIe controller works in EP mode and which PCIe > + controller works in RC mode. > > config PCI_HISI > depends on OF && (ARM64 || COMPILE_TEST) > diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/dwc/Makefile > index b085dfd..824fde7 100644 > --- a/drivers/pci/controller/dwc/Makefile > +++ b/drivers/pci/controller/dwc/Makefile > @@ -8,7 +8,8 @@ obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o > obj-$(CONFIG_PCI_IMX6) += pci-imx6.o > obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o > obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone.o > -obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o pci-layerscape-ep.o > +obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o > +obj-$(CONFIG_PCI_LAYERSCAPE_EP) += pci-layerscape-ep.o > obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o > obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o > obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o > -- > 1.7.1 >