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Wysocki" Cc: Bjorn Helgaas , Mika Westerberg , Linux PCI , linux@yadro.com, "Rafael J. Wysocki" , Linux PM , Logan Gunthorpe Subject: Re: [PATCH RESEND] PCI: disable runtime PM for PLX switches Message-ID: <20190627110624.nxwloyphithj4rmt@yadro.com> References: <20190415135903.wiyw34faiezdnbbs@yadro.com> <20190415141554.GL126710@google.com> <20190423215340.GH14616@google.com> <20190424100102.iyxogbsa4l7dyusb@yadro.com> <20190424141148.GA244134@google.com> <20190424145819.GL2654@lahna.fi.intel.com> <20190424172151.GB244134@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20180716 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Hi. On Wed, Apr 24, 2019 at 11:09:52PM +0200, Rafael J. Wysocki wrote: > On Wed, Apr 24, 2019 at 8:01 PM Bjorn Helgaas wrote: > > > > On Wed, Apr 24, 2019 at 05:58:19PM +0300, Mika Westerberg wrote: > > > On Wed, Apr 24, 2019 at 09:11:48AM -0500, Bjorn Helgaas wrote: > > > > - Maybe the PCI sysfs accessors (pci_mmap_resource(), etc) should > > > > turn off runtime PM? If we allow mmap of a BAR and then put the > > > > device in D3hot, that seems like a bug that could affect lots of > > > > things. But maybe that's already done magically elsewhere? > > > > > > IIRC there is no PM magic happening for MMIO userspace accesses. > > > > > > What you suggest above sounds like a good way to fix it. We already do > > > similar for config space access from userspace (if the device is in > > > D3cold) so definitely makes sense to do the same for MMIO. However, I > > > don't think we need to disable runtime PM - it should be enough to > > > increase the reference count (pm_runtime_get_sync() and friends) during > > > the time the MMIO resource is mmapped. > > > > OK, so if I understand correctly this would be basically adding > > pm_runtime_get_sync(dev) in pci_mmap_resource(). I don't know what > > the unmap path is, but there would have to be a matching > > pm_runtime_put() somewhere. > > Right. > > > And a similar change in the read/write path for /sys/.../resource; > > I think this must be related to the sysfs_create_bin_file() call in > > pci_create_attr(), but I don't see the path where the actual > > read/write to the device is done. > > > > And probably something similar should be done in pci_resource_io(), > > pci_map_rom(), and pci_unmap_rom(). > > In general, every path in which there is a memory or IO address space > access requires pm_runtime_get_sync()/pm_runtime_put() around it as > these accesses are only guaranteed to work in D0. > Tested a solution based on proposals by Logan, Bjorn, Mika, Rafael (thanks all of you, guys), I managed to fix the problem inside the PLX driver code. So no additional quirks or other modifications in Linux kernel needed. I think my patch can be easily rejected. Thanks for help. -- Regards, Alexander