Re: [PATCH] PCI: quirks: Fix register location for UPDCR

[Andrew Murray <andrew.murray@arm.com>]

On Tue, Sep 17, 2019 at 08:07:13PM +0200, Steffen Liebergeld wrote:
> According to documentation [0] the correct offset for the
> Upstream Peer Decode Configuration Register (UPDCR) is 0x1014.
> It was previously defined as 0x1114. This patch fixes it.
> 
> [0]
> https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/4th-gen-core-family-mobile-i-o-datasheet.pdf
> (page 325)
> 
> Signed-off-by: Steffen Liebergeld <steffen.liebergeld@kernkonzept.com>

You may also like to add:

Fixes: d99321b63b1f ("PCI: Enable quirks for PCIe ACS on Intel PCH root ports")
Reviewed-by: Andrew Murray <andrew.murray@arm.com>

As well as CC'ing stable.

I guess the side effect of this bug is that we claim to have peer
isolation when we do not. This fix ensures that we get the advertised
isolation.

Thanks,

Andrew Murray

> ---
>  drivers/pci/quirks.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 208aacf39329..7e184beb2aa4 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4602,7 +4602,7 @@ int pci_dev_specific_acs_enabled(struct pci_dev *dev,
> u16 acs_flags)
>  #define INTEL_BSPR_REG_BPPD  (1 << 9)
>   /* Upstream Peer Decode Configuration Register */
> -#define INTEL_UPDCR_REG 0x1114
> +#define INTEL_UPDCR_REG 0x1014
>  /* 5:0 Peer Decode Enable bits */
>  #define INTEL_UPDCR_REG_MASK 0x3f
>  -- 2.11.0