Re: [PATCH v2] PCI: quirks: Fix register location for UPDCR

[Bjorn Helgaas <helgaas@kernel.org>]

[+cc Andrew, Alex, Ashok]

Please cc people who commented on previous versions of a patch.  I
added them for you here.

This is probably fine, but I'm waiting to see if Ashok gets a response
from the chipset folks.  Hopefully he can ack this as a simple typo
fix.

On Wed, Sep 18, 2019 at 03:16:52PM +0200, Steffen Liebergeld wrote:
> According to documentation [0] the correct offset for the
> Upstream Peer Decode Configuration Register (UPDCR) is 0x1014.
> It was previously defined as 0x1114.
> 
> Commit d99321b63b1f intends to enforce isolation between PCI
> devices allowing them to be put into separate IOMMU groups.
> Due to the wrong register offset the intended isolation was not
> fully enforced. This is fixed with this patch.
> 
> Please note that I did not test this patch because I have
> no hardware that implements this register.
> 
> [0]
> https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/4th-gen-core-family-mobile-i-o-datasheet.pdf
> (page 325)
> 
> Fixes: d99321b63b1f ("PCI: Enable quirks for PCIe ACS on Intel PCH root ports")
> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
> Signed-off-by: Steffen Liebergeld <steffen.liebergeld@kernkonzept.com>
> ---
>  drivers/pci/quirks.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 208aacf39329..7e184beb2aa4 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4602,7 +4602,7 @@ int pci_dev_specific_acs_enabled(struct pci_dev
> *dev, u16 acs_flags)
>  #define INTEL_BSPR_REG_BPPD  (1 << 9)
>   /* Upstream Peer Decode Configuration Register */
> -#define INTEL_UPDCR_REG 0x1114
> +#define INTEL_UPDCR_REG 0x1014
>  /* 5:0 Peer Decode Enable bits */
>  #define INTEL_UPDCR_REG_MASK 0x3f
>  -- 2.11.0
> 
>