From: Bjorn Helgaas <helgaas@kernel.org>
To: linux-pci@vger.kernel.org
Cc: Alex Deucher <alexdeucher@gmail.com>,
Frederick Lawler <fred@fredlawl.com>,
Christian Koenig <christian.koenig@amd.com>,
Chunming Zhou <David1.Zhou@amd.com>,
Dave Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
amd-gfx@lists.freedesktop.org,
Bjorn Helgaas <bhelgaas@google.com>,
Alex Deucher <alexander.deucher@amd.com>
Subject: [PATCH 1/7] PCI: Add #defines for Enter Compliance, Transmit Margin
Date: Thu, 21 Nov 2019 08:02:14 -0600 [thread overview]
Message-ID: <20191121140220.38030-2-helgaas@kernel.org> (raw)
In-Reply-To: <20191121140220.38030-1-helgaas@kernel.org>
From: Bjorn Helgaas <bhelgaas@google.com>
Add definitions for the Enter Compliance and Transmit Margin fields of the
PCIe Link Control 2 register.
Link: https://lore.kernel.org/r/20191112173503.176611-2-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
---
include/uapi/linux/pci_regs.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 29d6e93fd15e..5869e5778a05 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -673,6 +673,8 @@
#define PCI_EXP_LNKCTL2_TLS_8_0GT 0x0003 /* Supported Speed 8GT/s */
#define PCI_EXP_LNKCTL2_TLS_16_0GT 0x0004 /* Supported Speed 16GT/s */
#define PCI_EXP_LNKCTL2_TLS_32_0GT 0x0005 /* Supported Speed 32GT/s */
+#define PCI_EXP_LNKCTL2_ENTER_COMP 0x0010 /* Enter Compliance */
+#define PCI_EXP_LNKCTL2_TX_MARGIN 0x0380 /* Transmit Margin */
#define PCI_EXP_LNKSTA2 50 /* Link Status 2 */
#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 52 /* v2 endpoints with link end here */
#define PCI_EXP_SLTCAP2 52 /* Slot Capabilities 2 */
--
2.24.0.432.g9d3f5f5b63-goog
next prev parent reply other threads:[~2019-11-21 14:02 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-21 14:02 [PATCH v2 0/7] PCI: Prefer pcie_capability_read_word() Bjorn Helgaas
2019-11-21 14:02 ` Bjorn Helgaas [this message]
2019-11-21 14:02 ` [PATCH 2/7] drm/amdgpu: Correct Transmit Margin masks Bjorn Helgaas
2019-11-21 14:02 ` [PATCH 3/7] drm/amdgpu: Replace numbers with PCI_EXP_LNKCTL2 definitions Bjorn Helgaas
2019-11-21 14:02 ` [PATCH 4/7] drm/amdgpu: Prefer pcie_capability_read_word() Bjorn Helgaas
2019-11-21 14:02 ` [PATCH 5/7] drm/radeon: Correct Transmit Margin masks Bjorn Helgaas
2019-11-21 14:02 ` [PATCH 6/7] drm/radeon: Replace numbers with PCI_EXP_LNKCTL2 definitions Bjorn Helgaas
2019-11-21 14:02 ` [PATCH 7/7] drm/radeon: Prefer pcie_capability_read_word() Bjorn Helgaas
2019-11-21 16:37 ` [PATCH v2 0/7] PCI: " Deucher, Alexander
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