From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FAKE_REPLY_C,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A487C33C9E for ; Fri, 17 Jan 2020 20:41:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4E90F20842 for ; Fri, 17 Jan 2020 20:41:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579293678; bh=X+HN8JA8Xxvdsg8uqHSGhQAuKo7DGP04S09Aa7FL/CU=; h=Date:From:To:Cc:Subject:In-Reply-To:List-ID:From; b=tNfL5Rsa+U8OtWOpb8DCMz2WlUwSXv9SUVcI1/MFvLrnDgY7A8gFWh1e6Lew3R+qD kz50Qa/zJ3mmU2+tHmdemO3coXFGrnOED0JHrBFt/wikAqEnAI3E1ufrFxXwnSy26g dF8VA3PIo4rWo74hXfKWTGLkAICiaOdHrSQuNORI= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729600AbgAQUlR (ORCPT ); Fri, 17 Jan 2020 15:41:17 -0500 Received: from mail.kernel.org ([198.145.29.99]:56818 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727519AbgAQUlR (ORCPT ); Fri, 17 Jan 2020 15:41:17 -0500 Received: from localhost (187.sub-174-234-133.myvzw.com [174.234.133.187]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 00EBA2072E; Fri, 17 Jan 2020 20:41:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579293677; bh=X+HN8JA8Xxvdsg8uqHSGhQAuKo7DGP04S09Aa7FL/CU=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=zAbWCcjEPpYO5qaR8+LvWr1qAZhtcTHoGqsK0nGWhln0iZrm3FZgs3CuVsZtWRldg KpjorYVAZaj58XfKaPP1ud7QblYwtxOBpVVIBkoARr2QUQbZZGOO/GiEmFW3vvqV9f SDYFyuEb+ipV5kw195W6N9YLcRQOvHzoEodTb1aM= Date: Fri, 17 Jan 2020 14:41:15 -0600 From: Bjorn Helgaas To: sathyanarayanan.kuppuswamy@linux.intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, "Rafael J. Wysocki" , Len Brown , Keith Busch , Huong Nguyen , Austin Bolen Subject: Re: [PATCH v12 8/8] PCI/ACPI: Enable EDR support Message-ID: <20200117204115.GA126492@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Sun, Jan 12, 2020 at 02:44:02PM -0800, sathyanarayanan.kuppuswamy@linux.intel.com wrote: > From: Kuppuswamy Sathyanarayanan > > As per PCI firmware specification r3.2 Downstream Port Containment > Related Enhancements ECN, sec 4.5.1, OS must implement following steps > to enable/use EDR feature. > > 1. OS can use bit 7 of _OSC Control Field to negotiate control over > Downstream Port Containment (DPC) configuration of PCIe port. After _OSC > negotiation, firmware will Set this bit to grant OS control over PCIe > DPC configuration and Clear it if this feature was requested and denied, > or was not requested. > > 2. Also, if OS supports EDR, it should expose its support to BIOS by > setting bit 7 of _OSC Support Field. And if OS sets bit 7 of _OSC > Control Field it must also expose support for EDR by setting bit 7 of > _OSC Support Field. > --- a/drivers/pci/pcie/portdrv_core.c > +++ b/drivers/pci/pcie/portdrv_core.c > @@ -253,10 +253,13 @@ static int get_port_device_capability(struct pci_dev *dev) > /* > * With dpc-native, allow Linux to use DPC even if it doesn't have > * permission to use AER. > + * If EDR support is enabled in OS, then even if AER is not handled in > + * OS, DPC service can be enabled. Can you clarify this comment? It talks about AER, but the code you added: (IS_ENABLED(CONFIG_PCIE_EDR) && !host->native_dpc) doesn't have anything to do with AER. > */ > if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) && > - pci_aer_available() && > - (pcie_ports_dpc_native || (services & PCIE_PORT_SERVICE_AER))) > + ((IS_ENABLED(CONFIG_PCIE_EDR) && !host->native_dpc) || > + (pci_aer_available() && > + (pcie_ports_dpc_native || (services & PCIE_PORT_SERVICE_AER))))) > services |= PCIE_PORT_SERVICE_DPC;