From: Bjorn Helgaas <helgaas@kernel.org>
To: Yicong Yang <yangyicong@hisilicon.com>
Cc: Jay Fang <f.fangjian@huawei.com>,
huangdaode@huawei.com, linux-pci@vger.kernel.org
Subject: Re: [PATCH v5 3/4] PCI: Use pci_speed_string() for all PCI/PCI-X/PCIe strings
Date: Mon, 2 Mar 2020 17:45:27 -0600 [thread overview]
Message-ID: <20200302234527.GA185793@google.com> (raw)
In-Reply-To: <4592a4cc-8064-2575-3a15-ae61dd03c23e@hisilicon.com>
On Sat, Feb 29, 2020 at 05:10:38PM +0800, Yicong Yang wrote:
> On 2020/2/29 11:07, Bjorn Helgaas wrote:
> > From: Bjorn Helgaas <bhelgaas@google.com>
> >
> > Previously some PCI speed strings came from pci_speed_string(), some came
> > from the PCIe-specific PCIE_SPEED2STR(), and some came from a PCIe-specific
> > switch statement. These methods were inconsistent:
> >
> > pci_speed_string() PCIE_SPEED2STR() switch
> > ------------------ ---------------- ------
> > 33 MHz PCI
> > ...
> > 2.5 GT/s PCIe 2.5 GT/s 2.5 GT/s
> > 5.0 GT/s PCIe 5 GT/s 5 GT/s
> > 8.0 GT/s PCIe 8 GT/s 8 GT/s
> > 16.0 GT/s PCIe 16 GT/s 16 GT/s
> > 32.0 GT/s PCIe 32 GT/s 32 GT/s
> >
> > Standardize on pci_speed_string() as the single source of these strings.
> >
> > Note that this adds ".0" and "PCIe" to some messages, including sysfs
> > "max_link_speed" files, a brcmstb "link up" message, and the link status
> > dmesg logging, e.g.,
> >
> > nvme 0000:01:00.0: 16.000 Gb/s available PCIe bandwidth, limited by 5.0 GT/s PCIe x4 link at 0000:00:01.1 (capable of 31.504 Gb/s with 8.0 GT/s PCIe x4 link)
> >
> > I think it's better to standardize on a single version of the speed text.
> > Previously we had strings like this:
> >
> > /sys/bus/pci/slots/0/cur_bus_speed: 8.0 GT/s PCIe
> > /sys/bus/pci/slots/0/max_bus_speed: 8.0 GT/s PCIe
> > /sys/devices/pci0000:00/0000:00:1c.0/current_link_speed: 8 GT/s
> > /sys/devices/pci0000:00/0000:00:1c.0/max_link_speed: 8 GT/s
> >
> > This changes the latter two to match the slots files:
> >
> > /sys/devices/pci0000:00/0000:00:1c.0/current_link_speed: 8.0 GT/s PCIe
> > /sys/devices/pci0000:00/0000:00:1c.0/max_link_speed: 8.0 GT/s PCIe
> >
> > Based-on-patch by: Yicong Yang <yangyicong@hisilicon.com>
> > Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> > ---
> > drivers/pci/controller/pcie-brcmstb.c | 3 +--
> > drivers/pci/pci-sysfs.c | 27 +++++----------------------
> > drivers/pci/pci.c | 6 +++---
> > drivers/pci/pci.h | 9 ---------
> > 4 files changed, 9 insertions(+), 36 deletions(-)
> >
> > diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
> > index d20aabc26273..41e88f1667bf 100644
> > --- a/drivers/pci/controller/pcie-brcmstb.c
> > +++ b/drivers/pci/controller/pcie-brcmstb.c
> > @@ -823,8 +823,7 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
> > lnksta = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA);
> > cls = FIELD_GET(PCI_EXP_LNKSTA_CLS, lnksta);
> > nlw = FIELD_GET(PCI_EXP_LNKSTA_NLW, lnksta);
> > - dev_info(dev, "link up, %s x%u %s\n",
> > - PCIE_SPEED2STR(cls + PCI_SPEED_133MHz_PCIX_533),
> > + dev_info(dev, "link up, %s x%u %s\n", pci_speed_string(cls),
> > nlw, ssc_good ? "(SSC)" : "(!SSC)");
>
> Here comes the problem. cls is not a pci_bus_speed enumerate. The
> PCIe link speed decodes from PCI_EXP_LNKSTA is from 0x000, we'll get
> the *wrong* string if passing cls directly to pci_speed_string().
> pcie_link_speed[](drivers/pci/probe.c, line 662) array should be
> used here to do the conversion.
>
> + dev_info(dev, "link up, %s x%u %s\n", pci_speed_string(pcie_link_speed[cls]),
> nlw, ssc_good ? "(SSC)" : "(!SSC)";
Oh, right, thanks!
next prev parent reply other threads:[~2020-03-02 23:45 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-29 3:07 [PATCH v5 0/4] Improve link speed presentation process Bjorn Helgaas
2020-02-29 3:07 ` [PATCH v5 1/4] PCI: Add 32 GT/s decoding in some macros Bjorn Helgaas
2020-02-29 3:07 ` [PATCH v5 2/4] PCI: Add pci_speed_string() Bjorn Helgaas
2020-02-29 3:07 ` [PATCH v5 3/4] PCI: Use pci_speed_string() for all PCI/PCI-X/PCIe strings Bjorn Helgaas
2020-02-29 9:10 ` Yicong Yang
2020-03-02 23:45 ` Bjorn Helgaas [this message]
2020-02-29 3:07 ` [PATCH v5 4/4] PCI: Add PCIE_LNKCAP2_SLS2SPEED() macro Bjorn Helgaas
2020-03-02 23:46 ` [PATCH v5 0/4] Improve link speed presentation process Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200302234527.GA185793@google.com \
--to=helgaas@kernel.org \
--cc=f.fangjian@huawei.com \
--cc=huangdaode@huawei.com \
--cc=linux-pci@vger.kernel.org \
--cc=yangyicong@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).