* Re: runtime pm without pci or platform subsystem involvement [not found] <CADnq5_NUueBoEXcO_HBHqwrONnmoAvepBLwwxtQW7R=SuyoFfQ@mail.gmail.com> @ 2020-04-23 19:52 ` Alex Deucher 2020-04-23 20:14 ` Bjorn Helgaas 0 siblings, 1 reply; 2+ messages in thread From: Alex Deucher @ 2020-04-23 19:52 UTC (permalink / raw) To: Linux PM, Linux PCI, Bjorn Helgaas, Rafael J. Wysocki On Wed, Apr 1, 2020 at 10:54 AM Alex Deucher <alexdeucher@gmail.com> wrote: > > Hi, > > I would like to be able to use the runtime pm infrastructure to > support additional power savings at runtime for a PCIe device, but for > various reasons, I need to keep the device in D0. I don't want the > PCI or platform subsystem to put the device into D3hot/cold. Is this > possible? If so how? I'd like to avoid spinning my own variant of > runtime pm just to support this feature. Expanding the audience a bit. Is what I want to do possible? Just want to make sure I don't re-invent something that already exists. Thanks, Alex > > Thanks, > > Alex ^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: runtime pm without pci or platform subsystem involvement 2020-04-23 19:52 ` runtime pm without pci or platform subsystem involvement Alex Deucher @ 2020-04-23 20:14 ` Bjorn Helgaas 0 siblings, 0 replies; 2+ messages in thread From: Bjorn Helgaas @ 2020-04-23 20:14 UTC (permalink / raw) To: Alex Deucher; +Cc: Linux PM, Linux PCI, Rafael J. Wysocki On Thu, Apr 23, 2020 at 03:52:17PM -0400, Alex Deucher wrote: > On Wed, Apr 1, 2020 at 10:54 AM Alex Deucher <alexdeucher@gmail.com> wrote: > > I would like to be able to use the runtime pm infrastructure to > > support additional power savings at runtime for a PCIe device, but for > > various reasons, I need to keep the device in D0. I don't want the > > PCI or platform subsystem to put the device into D3hot/cold. Is this > > possible? If so how? I'd like to avoid spinning my own variant of > > runtime pm just to support this feature. If you clear pdev->pm_cap as in 434fdb51513b ("drm/nouveau: workaround runpm fail by disabling PCI power management on certain intel bridges"), we'll assume the device doesn't support any PCI power management, which means the PCI core should leave the device in D0. D3cold is handled by ACPI or other platform means. I don't know how to disable that part. Bjorn ^ permalink raw reply [flat|nested] 2+ messages in thread
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2020-04-23 19:52 ` runtime pm without pci or platform subsystem involvement Alex Deucher
2020-04-23 20:14 ` Bjorn Helgaas
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