[PATCH v7 0/2] pciutils: Add basic decode support for CXL DVSEC

[Sean V Kelley <sean.v.kelley@linux.intel.com>]

Changes since v6 [1]:

- The CXL Vendor ID assigned by the PCI SIG is 1e98h and replaces the 8086h
value used in the CXL rev1.1 and prior specifications.
(Errata CXL 1.1 sec E27)

[1] https://lore.kernel.org/linux-pci/20200420221444.2641935-1-sean.v.kelley@linux.intel.com/

This patch series adds support for basic lspci decode of Compute eXpress Link,
a new CPU interconnect building upon PCIe. As a foundation for the CXL
support it adds separate Designated Vendor-Specific Capability (DVSEC) defines
and a cap function so as to align with PCIe r5.0, sec 7.9.6.2 terms and
provide available details. It makes use of the DVSEC Vendor ID and DVSEC ID so as
to identify a CXL capable device.

DocLink: https://www.computeexpresslink.org/

Sean V Kelley (2):
  pciutils: Decode available DVSEC details
  pciutils: Decode Compute eXpress Link DVSEC

 lib/header.h        |  25 ++++
 ls-ecaps.c          |  79 +++++++++-
 tests/cap-dvsec     | 340 ++++++++++++++++++++++++++++++++++++++++++++
 tests/cap-dvsec-cxl | 340 ++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 783 insertions(+), 1 deletion(-)
 create mode 100644 tests/cap-dvsec
 create mode 100644 tests/cap-dvsec-cxl

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2.26.2