From: Ansuel Smith <ansuelsmth@gmail.com>
To: Rob Herring <robh+dt@kernel.org>
Cc: Ansuel Smith <ansuelsmth@gmail.com>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Mark Rutland <mark.rutland@arm.com>,
Stanimir Varbanov <svarbanov@mm-sol.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Andrew Murray <amurray@thegoodpenguin.co.uk>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v5 09/11] PCI: qcom: Add ipq8064 rev2 variant
Date: Tue, 2 Jun 2020 13:53:50 +0200 [thread overview]
Message-ID: <20200602115353.20143-10-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20200602115353.20143-1-ansuelsmth@gmail.com>
Ipq8064-v2 have tx term offset set to 0. Introduce this variant to permit
different offset based on the revision.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
drivers/pci/controller/dwc/pcie-qcom.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 2cd6d1456210..259b627bf890 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -366,7 +366,8 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
val &= ~BIT(0);
writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
- if (of_device_is_compatible(node, "qcom,pcie-ipq8064")) {
+ if (of_device_is_compatible(node, "qcom,pcie-ipq8064") ||
+ of_device_is_compatible(node, "qcom,pcie-ipq8064-v2")) {
writel(PCS_DEEMPH_TX_DEEMPH_GEN1(24) |
PCS_DEEMPH_TX_DEEMPH_GEN2_3_5DB(24) |
PCS_DEEMPH_TX_DEEMPH_GEN2_6DB(34),
@@ -1464,6 +1465,7 @@ static int qcom_pcie_probe(struct platform_device *pdev)
static const struct of_device_id qcom_pcie_match[] = {
{ .compatible = "qcom,pcie-apq8084", .data = &ops_1_0_0 },
{ .compatible = "qcom,pcie-ipq8064", .data = &ops_2_1_0 },
+ { .compatible = "qcom,pcie-ipq8064-v2", .data = &ops_2_1_0 },
{ .compatible = "qcom,pcie-apq8064", .data = &ops_2_1_0 },
{ .compatible = "qcom,pcie-msm8996", .data = &ops_2_3_2 },
{ .compatible = "qcom,pcie-ipq8074", .data = &ops_2_3_3 },
--
2.25.1
next prev parent reply other threads:[~2020-06-02 11:55 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-02 11:53 [PATCH v5 00/11] Multiple fixes in PCIe qcom driver Ansuel Smith
2020-06-02 11:53 ` [PATCH v5 01/11] PCI: qcom: Add missing ipq806x clocks in PCIe driver Ansuel Smith
2020-06-02 11:53 ` [PATCH v5 02/11] dt-bindings: PCI: qcom: Add missing clks Ansuel Smith
2020-06-02 11:53 ` [PATCH v5 03/11] PCI: qcom: Change duplicate PCI reset to phy reset Ansuel Smith
2020-06-02 11:53 ` [PATCH v5 04/11] PCI: qcom: Add missing reset for ipq806x Ansuel Smith
2020-06-02 11:53 ` [PATCH v5 05/11] dt-bindings: PCI: qcom: Add ext reset Ansuel Smith
2020-06-02 11:53 ` [PATCH v5 06/11] PCI: qcom: Use bulk clk api and assert on error Ansuel Smith
2020-06-02 11:53 ` [PATCH v5 07/11] PCI: qcom: Define some PARF params needed for ipq8064 SoC Ansuel Smith
2020-06-06 16:30 ` Stanimir Varbanov
2020-06-02 11:53 ` [PATCH v5 08/11] PCI: qcom: Add support for tx term offset for rev 2.1.0 Ansuel Smith
2020-06-02 11:53 ` Ansuel Smith [this message]
2020-06-02 11:53 ` [PATCH v5 10/11] dt-bindings: PCI: qcom: Add ipq8064 rev 2 variant Ansuel Smith
2020-06-02 11:53 ` [PATCH v5 11/11] PCI: qcom: Add Force GEN1 support Ansuel Smith
2020-06-02 16:32 ` Bjorn Helgaas
2020-06-02 17:07 ` R: " ansuelsmth
2020-06-02 17:28 ` Bjorn Helgaas
2020-06-09 14:48 ` R: " ansuelsmth
2020-06-09 16:41 ` Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200602115353.20143-10-ansuelsmth@gmail.com \
--to=ansuelsmth@gmail.com \
--cc=agross@kernel.org \
--cc=amurray@thegoodpenguin.co.uk \
--cc=bhelgaas@google.com \
--cc=bjorn.andersson@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mark.rutland@arm.com \
--cc=p.zabel@pengutronix.de \
--cc=robh+dt@kernel.org \
--cc=svarbanov@mm-sol.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).