From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05C12C433E2 for ; Mon, 13 Jul 2020 16:41:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D590B2067D for ; Mon, 13 Jul 2020 16:41:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730047AbgGMQls (ORCPT ); Mon, 13 Jul 2020 12:41:48 -0400 Received: from foss.arm.com ([217.140.110.172]:46378 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729751AbgGMQlr (ORCPT ); Mon, 13 Jul 2020 12:41:47 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5BA601FB; Mon, 13 Jul 2020 09:41:47 -0700 (PDT) Received: from e121166-lin.cambridge.arm.com (e121166-lin.cambridge.arm.com [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E50D23F7D8; Mon, 13 Jul 2020 09:41:45 -0700 (PDT) Date: Mon, 13 Jul 2020 17:41:40 +0100 From: Lorenzo Pieralisi To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: Thomas Petazzoni , Andrew Murray , Bjorn Helgaas , Marek =?iso-8859-1?Q?Beh=FAn?= , Remi Pommarel , Tomasz Maciej Nowak , Xogium , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3] PCI: aardvark: Don't touch PCIe registers if no card connected Message-ID: <20200713164140.GA29307@e121166-lin.cambridge.arm.com> References: <20200528143141.29956-1-pali@kernel.org> <20200702083036.12230-1-pali@kernel.org> <20200709113509.GB19638@e121166-lin.cambridge.arm.com> <20200709122208.rmfeuu6zgbwh3fr5@pali> <20200709144701.GA21760@e121166-lin.cambridge.arm.com> <20200709150959.wq6zfkcy4m6hvvpl@pali> <20200710091800.GA3419@e121166-lin.cambridge.arm.com> <20200713082747.e3q3ml3wpbszn4j7@pali> <20200713112325.GA25865@e121166-lin.cambridge.arm.com> <20200713145003.foarsdixquicvivy@pali> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20200713145003.foarsdixquicvivy@pali> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Mon, Jul 13, 2020 at 04:50:03PM +0200, Pali Rohár wrote: > On Monday 13 July 2020 12:23:25 Lorenzo Pieralisi wrote: > > I will go over the thread again but I suspect I can merge the patch even > > though I still believe there is work to be done to understand the issue > > we are facing. > > Just to note that pci-mvebu.c also checks if pcie link is up before > trying to access the real PCIe interface registers, similarly as in my > patch. I understand - that does not change my opinion though, the link check is just a workaround, it'd be best if we pinpoint the real issue which is likely to a HW one. Lorenzo