From: Vidya Sagar <vidyas@nvidia.com>
To: <jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>,
<lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>,
<amurray@thegoodpenguin.co.uk>, <robh@kernel.org>,
<treding@nvidia.com>, <jonathanh@nvidia.com>
Cc: <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<kthota@nvidia.com>, <mmaddireddy@nvidia.com>,
<vidyas@nvidia.com>, <sagar.tv@gmail.com>
Subject: [PATCH 0/3] Add support to handle prefetchable memory
Date: Sat, 24 Oct 2020 01:26:52 +0530 [thread overview]
Message-ID: <20201023195655.11242-1-vidyas@nvidia.com> (raw)
This patch series adds support for configuring the DesignWare IP's ATU
region for prefetchable memory translations.
It first starts by flagging a warning if the size of non-prefetchable
aperture goes beyond 32-bit as PCIe spec doesn't allow it.
And then adds required support for programming the ATU to handle higher
(i.e. >4GB) sizes and then finally adds support for differentiating
between prefetchable and non-prefetchable regions and configuring one of
the ATU regions for prefetchable memory translations purpose.
Vidya Sagar (3):
PCI: of: Warn if non-prefetchable memory aperture size is > 32-bit
PCI: dwc: Add support to program ATU for >4GB memory aperture sizes
PCI: dwc: Add support to handle prefetchable memory mapping
.../pci/controller/dwc/pcie-designware-host.c | 39 ++++++++++++++++---
drivers/pci/controller/dwc/pcie-designware.c | 12 +++---
drivers/pci/controller/dwc/pcie-designware.h | 4 +-
drivers/pci/of.c | 5 +++
4 files changed, 48 insertions(+), 12 deletions(-)
--
2.17.1
next reply other threads:[~2020-10-23 19:57 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-23 19:56 Vidya Sagar [this message]
2020-10-23 19:56 ` [PATCH 1/3] PCI: of: Warn if non-prefetchable memory aperture size is > 32-bit Vidya Sagar
2020-10-26 17:51 ` Rob Herring
2020-10-23 19:56 ` [PATCH 2/3] PCI: dwc: Add support to program ATU for >4GB memory aperture sizes Vidya Sagar
2020-10-26 17:51 ` Rob Herring
2020-10-23 19:56 ` [PATCH 3/3] PCI: dwc: Add support to handle prefetchable memory mapping Vidya Sagar
2020-10-26 15:40 ` Rob Herring
2020-10-24 4:03 ` [PATCH 0/3] Add support to handle prefetchable memory Jingoo Han
2020-10-26 12:32 ` Thierry Reding
2020-11-04 7:46 ` Vidya Sagar
2020-11-17 4:38 ` Vidya Sagar
2020-11-17 12:10 ` [PATCH 0/3] Add support to handle prefetchable memoryg Lorenzo Pieralisi
2020-11-17 17:34 ` Vidya Sagar
2020-11-18 10:29 ` [PATCH 0/3] Add support to handle prefetchable memory Lorenzo Pieralisi
2020-11-04 9:50 ` Jon Hunter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201023195655.11242-1-vidyas@nvidia.com \
--to=vidyas@nvidia.com \
--cc=amurray@thegoodpenguin.co.uk \
--cc=bhelgaas@google.com \
--cc=gustavo.pimentel@synopsys.com \
--cc=jingoohan1@gmail.com \
--cc=jonathanh@nvidia.com \
--cc=kthota@nvidia.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mmaddireddy@nvidia.com \
--cc=robh@kernel.org \
--cc=sagar.tv@gmail.com \
--cc=treding@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).