From: Vidya Sagar <vidyas@nvidia.com>
To: <jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>,
<lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>,
<amurray@thegoodpenguin.co.uk>, <robh@kernel.org>,
<treding@nvidia.com>, <jonathanh@nvidia.com>
Cc: <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<kthota@nvidia.com>, <mmaddireddy@nvidia.com>,
<vidyas@nvidia.com>, <sagar.tv@gmail.com>
Subject: [PATCH V2 0/2] Add support to handle prefetchable memory
Date: Wed, 18 Nov 2020 20:16:24 +0530 [thread overview]
Message-ID: <20201118144626.32189-1-vidyas@nvidia.com> (raw)
This patch series adds support for configuring the DesignWare IP's ATU
region for prefetchable memory translations.
It first starts by flagging a warning if the size of non-prefetchable
aperture goes beyond 32-bit as PCIe spec doesn't allow it.
And then adds required support for programming the ATU to handle higher
(i.e. >4GB) sizes.
V2:
* Dropped third patch from the series as Rob's patch
(commit: 9fff3256f93d PCI: dwc: Restore ATU memory resource setup to use last entry)
is already accepted
* Rebased first two patches on top of Rob's latest patch
http://patchwork.ozlabs.org/project/linux-pci/patch/20201026181652.418729-1-robh@kernel.org/
Vidya Sagar (2):
PCI: of: Warn if non-prefetchable memory aperture size is > 32-bit
PCI: dwc: Add support to program ATU for >4GB memory
drivers/pci/controller/dwc/pcie-designware.c | 12 +++++++-----
drivers/pci/controller/dwc/pcie-designware.h | 3 ++-
drivers/pci/of.c | 5 +++++
3 files changed, 14 insertions(+), 6 deletions(-)
--
2.17.1
next reply other threads:[~2020-11-18 14:46 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-18 14:46 Vidya Sagar [this message]
2020-11-18 14:46 ` [PATCH V2 1/2] PCI: of: Warn if non-prefetchable memory aperture size is > 32-bit Vidya Sagar
2020-11-18 14:46 ` [PATCH V2 2/2] PCI: dwc: Add support to program ATU for >4GB memory Vidya Sagar
2020-11-18 16:18 ` [PATCH V2 0/2] Add support to handle prefetchable memory Lorenzo Pieralisi
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