From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A12F4C4361B for ; Thu, 10 Dec 2020 20:49:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 62A8223E26 for ; Thu, 10 Dec 2020 20:49:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2393767AbgLJUtg (ORCPT ); Thu, 10 Dec 2020 15:49:36 -0500 Received: from mail.kernel.org ([198.145.29.99]:52106 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390239AbgLJUtg (ORCPT ); Thu, 10 Dec 2020 15:49:36 -0500 Date: Thu, 10 Dec 2020 14:48:54 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1607633335; bh=/z/T40Uva+Pg+iPlqLTDfjeJB9MBwhWjej3odgV6F6U=; h=From:To:Cc:Subject:In-Reply-To:From; b=dCbz9XPmN1xPNrBwSLrDizhpKOFS8w2IioR+YbxorbAj4BbziF3vhStRN+Mhsy0sv 1nuLyrSS+5rOXsf+D26msP+N98jJ0HTK0jUeQQeppr9W+P2jjcFKD5XhpqJEBc76Ts /06XmQ45LikhCIMSA7c0xfwHHBDLxEMBMWHX5yw69UAMwmw+e6vu6rjbYDjYSSg4fX MCK31tmmmnuEWxZLmT85+1x89vUhOClssHhIb+nrURIsRI7km9Fn3pCNxLcb6TsYpJ mLBeiqfLXFHnj0kephzOOypg8Eq0EytPz0gf5AGk2Zt57KKvJ1zuj84WeRic2Rjke1 Vxxlp2i/JDdzQ== From: Bjorn Helgaas To: "David E. Box" Cc: bhelgaas@google.com, rafael@kernel.org, len.brown@intel.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, "Rafael J . Wysocki" Subject: Re: [PATCH v2 1/2] Add save/restore of Precision Time Measurement capability Message-ID: <20201210204854.GA52934@bjorn-Precision-5520> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201207223951.19667-1-david.e.box@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Mon, Dec 07, 2020 at 02:39:50PM -0800, David E. Box wrote: > The PCI subsystem does not currently save and restore the configuration > space for the Precision Time Measurement (PTM) PCIe extended capability > leading to the possibility of the feature returning disabled on S3 resume. > This has been observed on Intel Coffee Lake desktops. Add save/restore of > the PTM control register. This saves the PTM Enable, Root Select, and > Effective Granularity bits. > > Suggested-by: Rafael J. Wysocki > Signed-off-by: David E. Box Applied both to pci/ptm for v5.11, thanks! > --- > > Changes from V1: > - Move save/restore functions to ptm.c > - Move pci_add_ext_cap_sve_buffer() to pci_ptm_init in ptm.c > > drivers/pci/pci.c | 2 ++ > drivers/pci/pci.h | 8 ++++++++ > drivers/pci/pcie/ptm.c | 43 ++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 53 insertions(+) > > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > index e578d34095e9..12ba6351c05b 100644 > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -1566,6 +1566,7 @@ int pci_save_state(struct pci_dev *dev) > pci_save_ltr_state(dev); > pci_save_dpc_state(dev); > pci_save_aer_state(dev); > + pci_save_ptm_state(dev); > return pci_save_vc_state(dev); > } > EXPORT_SYMBOL(pci_save_state); > @@ -1677,6 +1678,7 @@ void pci_restore_state(struct pci_dev *dev) > pci_restore_vc_state(dev); > pci_restore_rebar_state(dev); > pci_restore_dpc_state(dev); > + pci_restore_ptm_state(dev); > > pci_aer_clear_status(dev); > pci_restore_aer_state(dev); > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h > index f86cae9aa1f4..62cdacba5954 100644 > --- a/drivers/pci/pci.h > +++ b/drivers/pci/pci.h > @@ -516,6 +516,14 @@ static inline int pci_iov_bus_range(struct pci_bus *bus) > > #endif /* CONFIG_PCI_IOV */ > > +#ifdef CONFIG_PCIE_PTM > +void pci_save_ptm_state(struct pci_dev *dev); > +void pci_restore_ptm_state(struct pci_dev *dev); > +#else > +static inline void pci_save_ptm_state(struct pci_dev *dev) {} > +static inline void pci_restore_ptm_state(struct pci_dev *dev) {} > +#endif > + > unsigned long pci_cardbus_resource_alignment(struct resource *); > > static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, > diff --git a/drivers/pci/pcie/ptm.c b/drivers/pci/pcie/ptm.c > index 357a454cafa0..6b24a1c9327a 100644 > --- a/drivers/pci/pcie/ptm.c > +++ b/drivers/pci/pcie/ptm.c > @@ -29,6 +29,47 @@ static void pci_ptm_info(struct pci_dev *dev) > dev->ptm_root ? " (root)" : "", clock_desc); > } > > +void pci_save_ptm_state(struct pci_dev *dev) > +{ > + int ptm; > + struct pci_cap_saved_state *save_state; > + u16 *cap; > + > + if (!pci_is_pcie(dev)) > + return; > + > + ptm = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM); > + if (!ptm) > + return; > + > + save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_PTM); > + if (!save_state) { > + pci_err(dev, "no suspend buffer for PTM\n"); > + return; > + } > + > + cap = (u16 *)&save_state->cap.data[0]; > + pci_read_config_word(dev, ptm + PCI_PTM_CTRL, cap); > +} > + > +void pci_restore_ptm_state(struct pci_dev *dev) > +{ > + struct pci_cap_saved_state *save_state; > + int ptm; > + u16 *cap; > + > + if (!pci_is_pcie(dev)) > + return; > + > + save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_PTM); > + ptm = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM); > + if (!save_state || !ptm) > + return; > + > + cap = (u16 *)&save_state->cap.data[0]; > + pci_write_config_word(dev, ptm + PCI_PTM_CTRL, *cap); > +} > + > void pci_ptm_init(struct pci_dev *dev) > { > int pos; > @@ -65,6 +106,8 @@ void pci_ptm_init(struct pci_dev *dev) > if (!pos) > return; > > + pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_PTM, sizeof(u16)); > + > pci_read_config_dword(dev, pos + PCI_PTM_CAP, &cap); > local_clock = (cap & PCI_PTM_GRANULARITY_MASK) >> 8; > > -- > 2.20.1 >