Linux PCI subsystem development
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From: Shirish S <shirish.s@amd.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Julian Schroeder <julian.schroeder@amd.com>
Subject: [PATCH] PCI: Add AMD RV2 based APUs, such as 3015Ce, to D3hot to D3 quirk table.
Date: Thu, 11 Mar 2021 10:11:35 +0530	[thread overview]
Message-ID: <20210311044135.119942-1-shirish.s@amd.com> (raw)

From: Julian Schroeder <julian.schroeder@amd.com>

This allows for an extra 10ms for the state transition.
Currently only AMD PCO based APUs are covered by this table.
WIP. Working on commit to kernel.org.

Signed-off-by: Julian Schroeder <julian.schroeder@amd.com>
---
 drivers/pci/quirks.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 653660e3ba9e..7d8f52524ada 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1904,6 +1904,7 @@ static void quirk_ryzen_xhci_d3hot(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e0, quirk_ryzen_xhci_d3hot);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e1, quirk_ryzen_xhci_d3hot);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e5, quirk_ryzen_xhci_d3hot);
 
 #ifdef CONFIG_X86_IO_APIC
 static int dmi_disable_ioapicreroute(const struct dmi_system_id *d)
-- 
2.17.1


             reply	other threads:[~2021-03-11  4:42 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-11  4:41 Shirish S [this message]
2021-03-11 12:53 ` [PATCH] PCI: Add AMD RV2 based APUs, such as 3015Ce, to D3hot to D3 quirk table Bjorn Helgaas
2021-03-19 13:51   ` Schroeder, Julian

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