From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22F7EC433ED for ; Fri, 14 May 2021 15:51:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D56556144A for ; Fri, 14 May 2021 15:51:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232417AbhENPwY (ORCPT ); Fri, 14 May 2021 11:52:24 -0400 Received: from mail.kernel.org ([198.145.29.99]:52094 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230326AbhENPwY (ORCPT ); Fri, 14 May 2021 11:52:24 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 21C8B6143F; Fri, 14 May 2021 15:51:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1621007472; bh=E72x2DimC2alRidZ5K5jhELQf7PEHR2vpeIfDSP77Qo=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=MRCfYUg7CqsWH3Bn1CgqwxW1MaO47cbZxyDUCJh5dzgL/0AzMLsZMuTKr9VaBKTly 6dUS6/juQOhN+zyde4K3C1Gz6S0uRrE9J/16OrK01qbK9uAnMwkIpDz7mQz3Uz1TN3 GZ8JPtwTzmzd2heM0DwvK+gVSXGomghLZZNDtO2/Bo9hWs+v2/63z4l0L11PMsXT5s 9QuyX3NnHwr3MaxVWNs6iBNsOAb+Y+i0ZdjwziieIfevlg49vko6pmeCGHGE86mvVp ldQPn0IJ4b/xTcf4ud2moKAGB/9mlyICBDPMaulhcvOVNT0L4qT0p+78c1uyh53Yc2 Q34mv7/wRuxPA== Date: Fri, 14 May 2021 10:51:10 -0500 From: Bjorn Helgaas To: Huacai Chen Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, Huacai Chen , Jiaxun Yang , Jianmin Lv Subject: Re: [PATCH 4/5] PCI: Add quirk for multifunction devices of LS7A Message-ID: <20210514155110.GA2764013@bjorn-Precision-5520> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210514080025.1828197-5-chenhuacai@loongson.cn> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Fri, May 14, 2021 at 04:00:24PM +0800, Huacai Chen wrote: > From: Jianmin Lv > > In LS7A, multifunction device use same pci PIN and different > irq for different function, so fix it for standard pci PIN > usage. Apparently the defect here is that the Interrupt Pin register reports the wrong INTx values? Will this be fixed in future hardware so we don't have to add more devices to the quirk? > Signed-off-by: Jianmin Lv > Signed-off-by: Huacai Chen > --- > drivers/pci/quirks.c | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index 10b3b2057940..6ab4b3bba36b 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -242,6 +242,23 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON, > DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON, > DEV_LS7A_LPC, loongson_system_bus_quirk); > > +static void loongson_pci_pin_quirk(struct pci_dev *dev) > +{ > + static const struct pci_device_id devids[] = { > + { PCI_VDEVICE(LOONGSON, DEV_PCIE_PORT_0) }, > + { PCI_VDEVICE(LOONGSON, DEV_PCIE_PORT_1) }, > + { PCI_VDEVICE(LOONGSON, DEV_PCIE_PORT_2) }, > + { 0, }, > + }; > + > + if (pci_match_id(devids, dev)) { > + u8 fun = dev->devfn & 7; Use PCI_FUNC(). > + dev->pin = 1 + (fun & 3); > + } > +} > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON, PCI_ANY_ID, loongson_pci_pin_quirk); The usual pattern is to list each device here instead of using pci_match_id() in the quirk, e.g., DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON, 0x7a09, loongson_pci_pin_quirk); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON, 0x7a19, loongson_pci_pin_quirk); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON, 0x7a29, loongson_pci_pin_quirk); > static void loongson_mrrs_quirk(struct pci_dev *dev) > { > struct pci_bus *bus = dev->bus; > -- > 2.27.0 >