From: Bjorn Helgaas <helgaas@kernel.org>
To: hemantk@codeaurora.org
Cc: bhelgaas@google.com, manivannan.sadhasivam@linaro.org,
bjorn.andersson@linaro.org, linux-pci@vger.kernel.org
Subject: Re: Query on ASPM driver design
Date: Fri, 23 Jul 2021 17:28:58 -0500 [thread overview]
Message-ID: <20210723222858.GA445474@bjorn-Precision-5520> (raw)
In-Reply-To: <7c3c904bc19850f667e2249ccdee0b37@codeaurora.org>
On Fri, Jul 23, 2021 at 03:04:52PM -0700, hemantk@codeaurora.org wrote:
> On 2021-07-23 13:32, Bjorn Helgaas wrote:
> > On Fri, Jul 23, 2021 at 01:11:18PM -0700, hemantk@codeaurora.org wrote:
> > > I have a question regarding PCIe ASPM driver in upstream. Looks like
> > > current ASPM driver is going to enable ASPM L1 and L1SS based on
> > > EP's config space capability register read. Why ASPM driver is
> > > enabling L1SS based on capability, instead of that can ASPM honor
> > > default control register value (in EP config space) and let pci
> > > device driver probe (or later after probe) to make the decision if
> > > ASPM needs to be enabled or not.
> >
> > Are you asking why the PCI core makes the decision about enabling ASPM
> > instead of having each device driver decide?
>
> Yes.
>
> > If you want each driver to decide, what benefit would that have?
>
> Basically if PCI EP has capability to support ASPM L1 and L1SS but
> power on default control reg values are meant to enumerate with ASPM
> disabled. Which means EP wants to keep ASPM disabled right from the
> enumeration, and at some point of time later EP wants to enable the
> ASPM. Main benefit is to give control to EP to enumerate with what
> ever its control reg's power on default value is. EP does not want
> to enable ASPM during its boot up and after entering to mission mode
> use case it would enable the ASPM.
The power-on default value for the "ASPM Control" field in the Link
Control register is 00b, which means ASPM is disabled. The current
Linux behavior is that when we enumerate the device, we evaluate the
L0s and L1 exit latencies and enable ASPM if the device can tolerate
them.
It sounds like you want to prevent ASPM from being enabled until the
driver explicitly enables it. Why? The device should not be active
until a driver claims it, so it should not be a problem to have ASPM
enabled.
> > > Basically point is: it is possible to honor what device control reg
> > > reflects power on default and let the pci ep driver running on host
> > > to make the decision when to enable/disable the aspm in kernel space
> > > pci driver.
> >
> > There is a pci_disable_link_state() interface that drivers can use to
> > disable certain link states. Some drivers use this to work around
> > hardware defects, but it would be better to use quirks in that
> > situation.
>
> Thanks for pointing this API, which quirk also uses. But we just
> have disable ver which EP driver can call only after enumeration is
> done. i was thinking of the other way round where EP enumerates and
> then calls enable API at some point of time. Also, if it decides to
> again disable and then enable.
There is currently no pci_enable_link_state() because nobody has
needed it and implemented it. I would push back a little bit on
adding this because I don't want to encourage drivers to mess with
ASPM.
Bjorn
next prev parent reply other threads:[~2021-07-23 22:29 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20210723203206.GA436727@bjorn-Precision-5520>
2021-07-23 22:04 ` Query on ASPM driver design hemantk
2021-07-23 22:28 ` Bjorn Helgaas [this message]
2021-07-27 2:21 ` Om Prakash Singh
2021-07-27 15:18 ` Bjorn Helgaas
2021-07-28 1:18 ` Om Prakash Singh
2021-07-28 16:01 ` Bjorn Helgaas
2021-07-29 2:35 ` Om Prakash Singh
2021-07-30 6:07 ` Om Prakash Singh
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