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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <stable@vger.kernel.org>,
	Ira Weiny <ira.weiny@intel.com>, <linux-pci@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <hch@lst.de>
Subject: Re: [PATCH v3 03/10] cxl/pci: Fix NULL vs ERR_PTR confusion
Date: Fri, 15 Oct 2021 17:15:07 +0100	[thread overview]
Message-ID: <20211015171507.000010dd@Huawei.com> (raw)
In-Reply-To: <163379785305.692348.7804260538462033304.stgit@dwillia2-desk3.amr.corp.intel.com>

On Sat, 9 Oct 2021 09:44:13 -0700
Dan Williams <dan.j.williams@intel.com> wrote:

> cxl_pci_map_regblock() may return an ERR_PTR(), but cxl_pci_setup_regs()
> is only prepared for NULL as the error case.
> 

What's the logic behind doing this rather than adjusting the call site to
check for an error pointer?

Either approach is fine as far as I'm concerned though so this is really
just a request for a bit more info in this patch description.

FWIW

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

> Fixes: f8a7e8c29be8 ("cxl/pci: Reserve all device regions at once")
> Cc: <stable@vger.kernel.org>
> Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Cc: Ira Weiny <ira.weiny@intel.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> ---
>  drivers/cxl/pci.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
> index ccc7c2573ddc..9c178002d49e 100644
> --- a/drivers/cxl/pci.c
> +++ b/drivers/cxl/pci.c
> @@ -317,7 +317,7 @@ static void __iomem *cxl_pci_map_regblock(struct cxl_mem *cxlm,
>  	if (pci_resource_len(pdev, bar) < offset) {
>  		dev_err(dev, "BAR%d: %pr: too small (offset: %#llx)\n", bar,
>  			&pdev->resource[bar], (unsigned long long)offset);
> -		return IOMEM_ERR_PTR(-ENXIO);
> +		return NULL;
>  	}
>  
>  	addr = pci_iomap(pdev, bar, 0);
> 


  parent reply	other threads:[~2021-10-15 16:15 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-09 16:43 [PATCH v3 00/10] cxl_pci refactor for reusability Dan Williams
2021-10-09 16:44 ` [PATCH v3 01/10] cxl/pci: Convert register block identifiers to an enum Dan Williams
2021-10-09 16:44 ` [PATCH v3 02/10] cxl/pci: Remove dev_dbg for unknown register blocks Dan Williams
2021-10-09 16:48   ` Joe Perches
2021-10-09 18:04     ` Ben Widawsky
2021-10-09 16:44 ` [PATCH v3 03/10] cxl/pci: Fix NULL vs ERR_PTR confusion Dan Williams
2021-10-10  3:44   ` Ira Weiny
2021-10-15 16:15   ` Jonathan Cameron [this message]
2021-10-15 20:16     ` Dan Williams
2021-10-15 21:29   ` [PATCH v6 " Dan Williams
2021-10-09 16:44 ` [PATCH v3 04/10] cxl/pci: Remove pci request/release regions Dan Williams
2021-10-09 16:44 ` [PATCH v3 05/10] cxl/pci: Make more use of cxl_register_map Dan Williams
2021-10-09 19:04   ` kernel test robot
2021-10-09 20:51   ` [PATCH v4 " Dan Williams
2021-10-10  4:03     ` Ira Weiny
2021-10-13 23:53     ` [PATCH v5 " Dan Williams
2021-10-09 16:44 ` [PATCH v3 06/10] cxl/pci: Add @base to cxl_register_map Dan Williams
2021-10-10  4:20   ` Ira Weiny
2021-10-13 22:53     ` Dan Williams
2021-10-15 16:29       ` Jonathan Cameron
2021-10-15 16:56         ` Dan Williams
2021-10-13 23:57   ` [PATCH v5 " Dan Williams
2021-10-15 21:57     ` [PATCH v6 " Dan Williams
2021-10-18  9:30       ` Jonathan Cameron
2021-10-15 16:27   ` [PATCH v3 " Jonathan Cameron
2021-10-15 16:55     ` Dan Williams
2021-10-18  9:30       ` Jonathan Cameron
2021-10-09 16:44 ` [PATCH v3 07/10] cxl/pci: Split cxl_pci_setup_regs() Dan Williams
2021-10-10  4:44   ` Ira Weiny
2021-10-13 22:45   ` Ben Widawsky
2021-10-13 22:49     ` Dan Williams
2021-10-14  0:12       ` Ben Widawsky
2021-10-14  0:48         ` Dan Williams
2021-10-15 16:44   ` Jonathan Cameron
2021-10-15 17:00     ` Dan Williams
2021-10-15 23:30   ` [PATCH v6 " Dan Williams
2021-11-10 17:14     ` Jonathan Cameron
2021-11-10 17:30       ` Ben Widawsky
2021-11-10 17:43         ` Jonathan Cameron
2021-10-09 16:44 ` [PATCH v3 08/10] PCI: Add pci_find_dvsec_capability to find designated VSEC Dan Williams
2021-10-09 16:44 ` [PATCH v3 09/10] cxl/pci: Use pci core's DVSEC functionality Dan Williams
2021-10-11 13:35   ` Jonathan Cameron
2021-10-09 16:44 ` [PATCH v3 10/10] ocxl: " Dan Williams

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