From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6892CC433F5 for ; Thu, 21 Oct 2021 12:17:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4621360EE2 for ; Thu, 21 Oct 2021 12:17:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231570AbhJUMT2 (ORCPT ); Thu, 21 Oct 2021 08:19:28 -0400 Received: from foss.arm.com ([217.140.110.172]:41900 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231561AbhJUMT1 (ORCPT ); Thu, 21 Oct 2021 08:19:27 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9EC041063; Thu, 21 Oct 2021 05:17:11 -0700 (PDT) Received: from lpieralisi (e121166-lin.cambridge.arm.com [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 458063F73D; Thu, 21 Oct 2021 05:17:10 -0700 (PDT) Date: Thu, 21 Oct 2021 13:17:05 +0100 From: Lorenzo Pieralisi To: Mauro Carvalho Chehab , kishon@ti.com Cc: linuxarm@huawei.com, mauro.chehab@huawei.com, Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Binghui Wang , Rob Herring , Xiaowei Song , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: Re: [PATCH v15 00/13] Add support for Hikey 970 PCIe Message-ID: <20211021121704.GA12568@lpieralisi> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org [+Kishon] On Thu, Oct 21, 2021 at 11:45:07AM +0100, Mauro Carvalho Chehab wrote: > Hi Lorenzo, > > I split patch 09/10 from v13 into three patches, in order to have one logical > change per patch, adding a proper descriptio to each of them. The final > code didn change. > > The pcie-kirin PCIe driver contains internally a PHY interface for > Kirin 960, but it misses support for Kirin 970. A new PHY driver > for it was added at drivers/phy/hisilicon/phy-hi3670-pcie.c > (already merged via PHY tree). > > Add support for Kirin 970 PHY driver at the pcie-kirin.c. > > While here, also add the needed logic to compile it as module and > to allow to dynamically remove the driver in runtime. > > Tested on HiKey970: > > # lspci -D -PP > 0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3670 (rev 01) > 0000:00:00.0/01:00.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba) > 0000:00:00.0/01:00.0/02:01.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba) > 0000:00:00.0/01:00.0/02:04.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba) > 0000:00:00.0/01:00.0/02:05.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba) > 0000:00:00.0/01:00.0/02:07.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba) > 0000:00:00.0/01:00.0/02:09.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba) > 0000:00:00.0/01:00.0/02:01.0/03:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd Device a809 > 0000:00:00.0/01:00.0/02:07.0/06:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 07) > > Tested on HiKey960: > > # lspci -D > 0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3660 (rev 01) > > --- > > v15: > - The power-off fix patch was split into 3, in order to have one logical change > per patch. > - Removed Fixes: tag from the poweroff patch; > - Adjusted capitalization of two patch summary lines > - No functional changes. The diff of this series is identical to v14. > > v14: > - Split a timeout logic from patch 4, placing it on a separate patch; > - Added fixes: and cc: tags to the power_off fixup patch; > - change a typecast from of_data to long, in order to avoid a warning on > some randconfigs; > - removed uneeded brackets at the power_off patch; > - reordered struct device pointers at kirin_pcie_get_resource(); > - added a c/c to kishon at the PHY-related patches. > > v13: > - Added Xiaowei's ack for the series. > > v12: > - Change a comment at patch 1 to not use c99 style. > > v11: > - patch 5 changed to use the right PCIe topology > - all other patches are identical to v10. > > v10: > - patch 1: dropped magic numbers from PHY driver > - patch 5: allow pcie child nodes without reset-gpios > - all other patches are identical to v9. > > v9: > - Did some cleanups at patches 1 and 5 > > Mauro Carvalho Chehab (13): > PCI: kirin: Reorganize the PHY logic inside the driver > PCI: kirin: Add support for a PHY layer > PCI: kirin: Use regmap for APB registers > PCI: kirin: Add support for bridge slot DT schema > PCI: kirin: Give more time for PERST# reset to finish > PCI: kirin: Add Kirin 970 compatible > PCI: kirin: Add MODULE_* macros > PCI: kirin: Allow building it as a module > PCI: kirin: Add power_off support for Kirin 960 PHY > PCI: kirin: Move the power-off code to a common routine > PCI: kirin: Disable clkreq during poweroff sequence > PCI: kirin: De-init the dwc driver > PCI: kirin: Allow removing the driver > > drivers/pci/controller/dwc/Kconfig | 2 +- > drivers/pci/controller/dwc/pcie-kirin.c | 643 ++++++++++++++++++------ > 2 files changed, 497 insertions(+), 148 deletions(-) Hi Kishon, can I ask you please to have a look at patches [1,2] ? I'd like to merge this series for v5.16, please let me know. Thanks, Lorenzo