From: "Pali Rohár" <pali@kernel.org>
To: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Cc: "Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
linuxarm@huawei.com, mauro.chehab@huawei.com,
"Krzysztof Wilczyński" <kw@linux.com>,
Songxiaowei <songxiaowei@hisilicon.com>,
"Binghui Wang" <wangbinghui@hisilicon.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Rob Herring" <robh@kernel.org>,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v14 05/11] PCI: kirin: give more time for PERST# reset to finish
Date: Sat, 23 Oct 2021 16:55:52 +0200 [thread overview]
Message-ID: <20211023145552.3ly4kukfyrark7c2@pali> (raw)
In-Reply-To: <20211023144534.55aaecf9@sal.lan>
On Saturday 23 October 2021 14:45:34 Mauro Carvalho Chehab wrote:
> Em Sat, 23 Oct 2021 12:40:11 +0200
> Pali Rohár <pali@kernel.org> escreveu:
> > It is classic setup for boards with just one PCIe port.
> >
> > > with 3 elements connected to the bus: an Ethernet card, a M.2 slot and
> > > a mini PCIe slot. It seems HiKey 970 is unique with regards to PERST# signal,
> > > as there are 4 independent PERST# signals there:
> > >
> > > - one for PEX 8606 (the PCIe root port);
> > > - one for Ethernet;
> > > - one for M.2;
> > > - one for mini-PCIe.
> >
> > This is not unique setup, its pretty normal. Every PCIe card has (own)
> > PERST# pin and obviously you want to control each pin separately via SW.
> > And because PCIe switch is also (upstream) PCIe device it has also
> > PERST# pin.
>
> Based on the discussions we had to add per-port DT PERST# gpios, it
> sounded to me that this is was not a typical setup ;-)
>
> It seems that the typical setup is to have a single PERST# connected
> to all devices inside the bus.
Hello!
I'm sure it is not unique :) Just seems that these boards either do not
use device tree (x86-based) or do not have specified reset-gpios in DTS
at all.
Sometimes there is no need to touch PERST# gpio as either firmware
during boot handles it (x86 BIOS/UEFI case, or U-Boot for arm case) or
because board/cpu reset toggle PERST# in a way that is compatible for
cards init.
Looks like you have non-x86 board, which does not have PCIe init code in
firmware, needs special handling of PERST# and you are doing it with
upstream kernel :-) So maybe all these conditions are unique... But HW
design not.
As this setup with reset-gpios per card in DTS nodes is something which
I will need too, I sent email to Rob with proposal how to universally
declare it in DTS, independently of PCIe controller (you are on CC):
https://lore.kernel.org/linux-pci/20211023144252.z7ou2l2tvm6cvtf7@pali/
Due to how PCIe cards are broken, PERST# signal is sometimes the only
one option how to reset card at runtime. So requirement for separate
PERST# per card configurable at runtime by OS will be requirement for
more and more boards.
next prev parent reply other threads:[~2021-10-23 14:55 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-19 6:06 [PATCH v14 00/11] Add support for Hikey 970 PCIe Mauro Carvalho Chehab
2021-10-19 6:06 ` [PATCH v14 01/11] PCI: kirin: Reorganize the PHY logic inside the driver Mauro Carvalho Chehab
2021-10-19 6:06 ` [PATCH v14 02/11] PCI: kirin: Add support for a PHY layer Mauro Carvalho Chehab
2021-10-19 6:06 ` [PATCH v14 03/11] PCI: kirin: Use regmap for APB registers Mauro Carvalho Chehab
2021-10-19 6:06 ` [PATCH v14 04/11] PCI: kirin: Add support for bridge slot DT schema Mauro Carvalho Chehab
2022-05-24 17:19 ` Bjorn Helgaas
2022-05-24 18:59 ` Bjorn Helgaas
2022-05-24 19:55 ` Mauro Carvalho Chehab
2022-05-24 21:29 ` Bjorn Helgaas
2021-10-19 6:06 ` [PATCH v14 05/11] PCI: kirin: give more time for PERST# reset to finish Mauro Carvalho Chehab
2021-10-21 12:27 ` Lorenzo Pieralisi
2021-10-21 12:40 ` Mauro Carvalho Chehab
2021-10-22 15:16 ` Pali Rohár
2021-10-23 9:30 ` Mauro Carvalho Chehab
2021-10-23 10:40 ` Pali Rohár
2021-10-23 13:45 ` Mauro Carvalho Chehab
2021-10-23 14:55 ` Pali Rohár [this message]
2021-10-25 10:25 ` Lorenzo Pieralisi
2021-10-25 10:40 ` Mauro Carvalho Chehab
2021-10-26 17:06 ` Lorenzo Pieralisi
2021-10-19 6:06 ` [PATCH v14 06/11] PCI: kirin: Add Kirin 970 compatible Mauro Carvalho Chehab
2021-10-19 6:06 ` [PATCH v14 07/11] PCI: kirin: Add MODULE_* macros Mauro Carvalho Chehab
2021-10-19 6:06 ` [PATCH v14 08/11] PCI: kirin: Allow building it as a module Mauro Carvalho Chehab
2021-10-19 6:06 ` [PATCH v14 09/11] PCI: kirin: Add power_off support for Kirin 960 PHY Mauro Carvalho Chehab
2021-10-19 6:06 ` [PATCH v14 10/11] PCI: kirin: fix poweroff sequence Mauro Carvalho Chehab
2021-10-19 6:06 ` [PATCH v14 11/11] PCI: kirin: Allow removing the driver Mauro Carvalho Chehab
2021-10-19 19:27 ` [PATCH v14 00/11] Add support for Hikey 970 PCIe Bjorn Helgaas
2021-10-20 5:41 ` Mauro Carvalho Chehab
2021-10-20 19:02 ` Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211023145552.3ly4kukfyrark7c2@pali \
--to=pali@kernel.org \
--cc=bhelgaas@google.com \
--cc=kw@linux.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=lorenzo.pieralisi@arm.com \
--cc=mauro.chehab@huawei.com \
--cc=mchehab+huawei@kernel.org \
--cc=robh@kernel.org \
--cc=songxiaowei@hisilicon.com \
--cc=wangbinghui@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox