From: "Pali Rohár" <pali@kernel.org>
To: "Martin Mares" <mj@ucw.cz>, "Bjorn Helgaas" <helgaas@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Matthew Wilcox" <willy@infradead.org>,
linux-pci@vger.kernel.org
Subject: [PATCH v2] lspci: Show Slot Power Limit values above EFh
Date: Mon, 1 Nov 2021 15:47:40 +0100 [thread overview]
Message-ID: <20211101144740.14256-1-pali@kernel.org> (raw)
PCI Express Base Specification rev. 3.0 has the following definition for
the Slot Power Limit Value:
=======================================================================
When the Slot Power Limit Scale field equals 00b (1.0x) and Slot Power
Limit Value exceeds EFh, the following alternative encodings are used:
F0h = 250 W Slot Power Limit
F1h = 275 W Slot Power Limit
F2h = 300 W Slot Power Limit
F3h to FFh = Reserved for Slot Power Limit values above 300 W
=======================================================================
Replace function power_limit() by show_power_limit() which also prints
power limit value. Show reserved value as string ">300W" and omit usage of
floating point variables as it is not needed.
---
ls-caps.c | 38 ++++++++++++++++++++++++++++----------
1 file changed, 28 insertions(+), 10 deletions(-)
diff --git a/ls-caps.c b/ls-caps.c
index db56556971cb..7fa6c1da45bd 100644
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -656,10 +656,27 @@ static int exp_downstream_port(int type)
type == PCI_EXP_TYPE_PCIE_BRIDGE; /* PCI/PCI-X to PCIe Bridge */
}
-static float power_limit(int value, int scale)
+static void show_power_limit(int value, int scale)
{
- static const float scales[4] = { 1.0, 0.1, 0.01, 0.001 };
- return value * scales[scale];
+ static const int scales[4] = { 1000, 100, 10, 1 };
+ static const int scale0_values[3] = { 250, 275, 300 };
+ if (scale == 0 && value >= 0xF0) {
+ /* F3h to FFh = Reserved for Slot Power Limit values above 300 W */
+ if (value >= 0xF3) {
+ printf(">300W");
+ return;
+ }
+ value = scale0_values[value - 0xF0];
+ }
+ value *= scales[scale];
+ printf("%d", value / 1000);
+ if (value % 10)
+ printf(".%03d", value % 1000);
+ else if (value % 100)
+ printf(".%02d", (value / 10) % 100);
+ else if (value % 1000)
+ printf(".%d", (value / 100) % 10);
+ printf("W");
}
static const char *latency_l0s(int value)
@@ -700,10 +717,10 @@ static void cap_express_dev(struct device *d, int where, int type)
printf(" FLReset%c",
FLAG(t, PCI_EXP_DEVCAP_FLRESET));
if ((type == PCI_EXP_TYPE_ENDPOINT) || (type == PCI_EXP_TYPE_UPSTREAM) ||
- (type == PCI_EXP_TYPE_PCI_BRIDGE))
- printf(" SlotPowerLimit %.3fW",
- power_limit((t & PCI_EXP_DEVCAP_PWR_VAL) >> 18,
- (t & PCI_EXP_DEVCAP_PWR_SCL) >> 26));
+ (type == PCI_EXP_TYPE_PCI_BRIDGE)) {
+ printf(" SlotPowerLimit ");
+ show_power_limit((t & PCI_EXP_DEVCAP_PWR_VAL) >> 18, (t & PCI_EXP_DEVCAP_PWR_SCL) >> 26);
+ }
printf("\n");
w = get_conf_word(d, where + PCI_EXP_DEVCTL);
@@ -871,9 +888,10 @@ static void cap_express_slot(struct device *d, int where)
FLAG(t, PCI_EXP_SLTCAP_PWRI),
FLAG(t, PCI_EXP_SLTCAP_HPC),
FLAG(t, PCI_EXP_SLTCAP_HPS));
- printf("\t\t\tSlot #%d, PowerLimit %.3fW; Interlock%c NoCompl%c\n",
- (t & PCI_EXP_SLTCAP_PSN) >> 19,
- power_limit((t & PCI_EXP_SLTCAP_PWR_VAL) >> 7, (t & PCI_EXP_SLTCAP_PWR_SCL) >> 15),
+ printf("\t\t\tSlot #%d, PowerLimit ",
+ (t & PCI_EXP_SLTCAP_PSN) >> 19);
+ show_power_limit((t & PCI_EXP_SLTCAP_PWR_VAL) >> 7, (t & PCI_EXP_SLTCAP_PWR_SCL) >> 15);
+ printf("; Interlock%c NoCompl%c\n",
FLAG(t, PCI_EXP_SLTCAP_INTERLOCK),
FLAG(t, PCI_EXP_SLTCAP_NOCMDCOMP));
--
2.20.1
next prev reply other threads:[~2021-11-01 14:48 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-03 11:48 lspci: Slot Power Limit values above EFh Pali Rohár
2021-04-03 15:48 ` Matthew Wilcox
2021-11-01 14:47 ` Pali Rohár [this message]
2021-11-01 15:03 ` [PATCH v2] lspci: Show " Matthew Wilcox
2021-11-24 12:46 ` Pali Rohár
2021-12-26 22:07 ` Martin Mareš
2021-12-26 22:41 ` [PATCH v3 pciutils] " Pali Rohár
2021-12-26 22:43 ` Martin Mareš
2021-12-26 23:34 ` [PATCH v4 " Pali Rohár
2021-12-26 23:55 ` Martin Mareš
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