Re: [RFC PATCH v5 0/4] PCI/ASPM: Remove struct aspm_latency

Bjorn Helgaas
2021-11-19T22:51:19Z

On Fri, Nov 19, 2021 at 08:37:28PM +0100, Saheed O. Bolarinwa wrote:
> To validate and set link latency capability, `struct aspm_latency` and
> related members defined within `struct pcie_link_state` are used.
> However, since there are not many access to theses values, it is
> possible to directly access and compute these values.
>
> Doing this will also reduce the dependency on `struct pcie_link_state`.
>
> The series removes `struct aspm_latency` and related members within
> `struct pcie_link_state`. All latencies are now calculated when needed.
>
>
> VERSION CHANGES:
> - v2:
> » - directly access downstream by calling `pci_function_0()`
> » instead of using the `struct pcie_link_state`
> - v3:
> » - rebase on Linux 5.15-rc2
> - v4
> » - Create a seprate path to move pci_function_0() upward
> - v5
> - shorten long lines as noted in the review
>
> MERGE NOTICE:
> These series are based on
> » 'commit fa55b7dcdc43 ("Linux 5.16-rc1")'
>
> Reviewed-by: Christoph Hellwig <hch@lst.de>
>
> Bolarinwa O. Saheed (1):
> PCI/ASPM: Move pci_function_0() upward
>
> Saheed O. Bolarinwa (3):
> PCI/ASPM: Do not cache link latencies
> PCI/ASPM: Remove struct pcie_link_state.acceptable
> PCI/ASPM: Remove struct aspm_latency
>
> drivers/pci/pcie/aspm.c | 95 +++++++++++++++++++----------------------
> 1 file changed, 44 insertions(+), 51 deletions(-)

Applied to pci/aspm for v5.17, thanks very much! We're chipping away
at the cruft in aspm.c little by little.

I made the following changes. Some whitespace; the rest to take
advantage of the fact that Device Capabilities is read-only and Amey
added a cache of it with 691392448065 ("PCI: Cache PCIe Device
Capabilities register")

That commit uses FIELD_GET(), which is kind of slick and might be
useful in aspm.c as well.

diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index e29611080a90..c6d2e76e0502 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -378,7 +378,7 @@ static void encode_l12_threshold(u32 threshold_us, u32 *scale, u32 *value)

static void pcie_aspm_check_latency(struct pci_dev *endpoint)
{
- u32 reg32, latency, encoding, lnkcap_up, lnkcap_dw;
+ u32 latency, encoding, lnkcap_up, lnkcap_dw;
u32 l1_switch_latency = 0, latency_up_l0s;
u32 latency_up_l1, latency_dw_l0s, latency_dw_l1;
u32 acceptable_l0s, acceptable_l1;
@@ -390,24 +390,22 @@ static void pcie_aspm_check_latency(struct pci_dev *endpoint)
return;

link = endpoint->bus->self->link_state;
- pcie_capability_read_dword(endpoint, PCI_EXP_DEVCAP, &reg32);
+
/* Calculate endpoint L0s acceptable latency */
- encoding = (reg32 & PCI_EXP_DEVCAP_L0S) >> 6;
+ encoding = (endpoint->devcap & PCI_EXP_DEVCAP_L0S) >> 6;
acceptable_l0s = calc_l0s_acceptable(encoding);
+
/* Calculate endpoint L1 acceptable latency */
- encoding = (reg32 & PCI_EXP_DEVCAP_L1) >> 9;
+ encoding = (endpoint->devcap & PCI_EXP_DEVCAP_L1) >> 9;
acceptable_l1 = calc_l1_acceptable(encoding);

while (link) {
- struct pci_dev *dev = pci_function_0(
- link->pdev->subordinate);
+ struct pci_dev *dev = pci_function_0(link->pdev->subordinate);

/* Read direction exit latencies */
- pcie_capability_read_dword(link->pdev,
- PCI_EXP_LNKCAP,
+ pcie_capability_read_dword(link->pdev, PCI_EXP_LNKCAP,
&lnkcap_up);
- pcie_capability_read_dword(dev,
- PCI_EXP_LNKCAP,
+ pcie_capability_read_dword(dev, PCI_EXP_LNKCAP,
&lnkcap_dw);
latency_up_l0s = calc_l0s_latency(lnkcap_up);
latency_up_l1 = calc_l1_latency(lnkcap_up);