From: Thomas Gleixner <tglx@linutronix.de> To: LKML <linux-kernel@vger.kernel.org> Cc: Bjorn Helgaas <helgaas@kernel.org>, Marc Zygnier <maz@kernel.org>, Alex Williamson <alex.williamson@redhat.com>, Kevin Tian <kevin.tian@intel.com>, Jason Gunthorpe <jgg@nvidia.com>, Megha Dey <megha.dey@intel.com>, Ashok Raj <ashok.raj@intel.com>, linux-pci@vger.kernel.org, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, linux-s390@vger.kernel.org, Heiko Carstens <hca@linux.ibm.com>, Christian Borntraeger <borntraeger@de.ibm.com>, Jon Mason <jdmason@kudzu.us>, Dave Jiang <dave.jiang@intel.com>, Allen Hubbe <allenbh@gmail.com>, linux-ntb@googlegroups.com Subject: [patch 11/32] PCI/MSI: Use msi_on_each_desc() Date: Sat, 27 Nov 2021 02:22:44 +0100 (CET) [thread overview] Message-ID: <20211126232734.949173952@linutronix.de> (raw) In-Reply-To: 20211126230957.239391799@linutronix.de Use the new iterator functions which pave the way for dynamically extending MSI-X vectors. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> --- drivers/pci/msi/irqdomain.c | 4 ++-- drivers/pci/msi/legacy.c | 19 ++++++++----------- drivers/pci/msi/msi.c | 30 ++++++++++++++---------------- 3 files changed, 24 insertions(+), 29 deletions(-) --- a/drivers/pci/msi/irqdomain.c +++ b/drivers/pci/msi/irqdomain.c @@ -83,7 +83,7 @@ static int pci_msi_domain_check_cap(stru struct msi_domain_info *info, struct device *dev) { - struct msi_desc *desc = first_pci_msi_entry(to_pci_dev(dev)); + struct msi_desc *desc = msi_first_desc(dev); /* Special handling to support __pci_enable_msi_range() */ if (pci_msi_desc_is_multi_msi(desc) && @@ -98,7 +98,7 @@ static int pci_msi_domain_check_cap(stru unsigned int idx = 0; /* Check for gaps in the entry indices */ - for_each_msi_entry(desc, dev) { + msi_for_each_desc(desc, dev, MSI_DESC_ALL) { if (desc->msi_index != idx++) return -ENOTSUPP; } --- a/drivers/pci/msi/legacy.c +++ b/drivers/pci/msi/legacy.c @@ -29,7 +29,7 @@ int __weak arch_setup_msi_irqs(struct pc if (type == PCI_CAP_ID_MSI && nvec > 1) return 1; - for_each_pci_msi_entry(desc, dev) { + msi_for_each_desc(desc, &dev->dev, MSI_DESC_NOTASSOCIATED) { ret = arch_setup_msi_irq(dev, desc); if (ret) return ret < 0 ? ret : -ENOSPC; @@ -43,27 +43,24 @@ void __weak arch_teardown_msi_irqs(struc struct msi_desc *desc; int i; - for_each_pci_msi_entry(desc, dev) { - if (desc->irq) { - for (i = 0; i < entry->nvec_used; i++) - arch_teardown_msi_irq(desc->irq + i); - } + msi_for_each_desc(desc, &dev->dev, MSI_DESC_ASSOCIATED) { + for (i = 0; i < desc->nvec_used; i++) + arch_teardown_msi_irq(desc->irq + i); } } static int pci_msi_setup_check_result(struct pci_dev *dev, int type, int ret) { - struct msi_desc *entry; + struct msi_desc *desc; int avail = 0; if (type != PCI_CAP_ID_MSIX || ret >= 0) return ret; /* Scan the MSI descriptors for successfully allocated ones. */ - for_each_pci_msi_entry(entry, dev) { - if (entry->irq != 0) - avail++; - } + msi_for_each_desc(desc, &dev->dev, MSI_DESC_ASSOCIATED) + avail++; + return avail ? avail : ret; } --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -299,7 +299,6 @@ static void __pci_restore_msix_state(str if (!dev->msix_enabled) return; - BUG_ON(list_empty(dev_to_msi_list(&dev->dev))); /* route the table */ pci_intx_for_msi(dev, 0); @@ -309,7 +308,7 @@ static void __pci_restore_msix_state(str write_msg = arch_restore_msi_irqs(dev); msi_lock_descs(&dev->dev); - for_each_pci_msi_entry(entry, dev) { + msi_for_each_desc(entry, &dev->dev, MSI_DESC_ALL) { if (write_msg) __pci_write_msi_msg(entry, &entry->msg); pci_msix_write_vector_ctrl(entry, entry->pci.msix_ctrl); @@ -378,14 +377,14 @@ static int msi_verify_entries(struct pci if (!dev->no_64bit_msi) return 0; - for_each_pci_msi_entry(entry, dev) { + msi_for_each_desc(entry, &dev->dev, MSI_DESC_ALL) { if (entry->msg.address_hi) { pci_err(dev, "arch assigned 64-bit MSI address %#x%08x but device only supports 32 bits\n", entry->msg.address_hi, entry->msg.address_lo); - return -EIO; + break; } } - return 0; + return !entry ? 0 : -EIO; } /** @@ -418,7 +417,7 @@ static int msi_capability_init(struct pc goto unlock; /* All MSIs are unmasked by default; mask them all */ - entry = first_pci_msi_entry(dev); + entry = msi_first_desc(&dev->dev); pci_msi_mask(entry, msi_multi_mask(entry)); /* Configure MSI capability structure */ @@ -508,11 +507,11 @@ static int msix_setup_msi_descs(struct p static void msix_update_entries(struct pci_dev *dev, struct msix_entry *entries) { - struct msi_desc *entry; + struct msi_desc *desc; if (entries) { - for_each_pci_msi_entry(entry, dev) { - entries->vector = entry->irq; + msi_for_each_desc(desc, &dev->dev, MSI_DESC_ALL) { + entries->vector = desc->irq; entries++; } } @@ -705,15 +704,14 @@ static void pci_msi_shutdown(struct pci_ if (!pci_msi_enable || !dev || !dev->msi_enabled) return; - BUG_ON(list_empty(dev_to_msi_list(&dev->dev))); - desc = first_pci_msi_entry(dev); - pci_msi_set_enable(dev, 0); pci_intx_for_msi(dev, 1); dev->msi_enabled = 0; /* Return the device with MSI unmasked as initial states */ - pci_msi_unmask(desc, msi_multi_mask(desc)); + desc = msi_first_desc(&dev->dev); + if (!WARN_ON_ONCE(!desc)) + pci_msi_unmask(desc, msi_multi_mask(desc)); /* Restore dev->irq to its default pin-assertion IRQ */ dev->irq = desc->pci.msi_attrib.default_irq; @@ -789,7 +787,7 @@ static int __pci_enable_msix(struct pci_ static void pci_msix_shutdown(struct pci_dev *dev) { - struct msi_desc *entry; + struct msi_desc *desc; if (!pci_msi_enable || !dev || !dev->msix_enabled) return; @@ -800,8 +798,8 @@ static void pci_msix_shutdown(struct pci } /* Return the device with MSI-X masked as initial states */ - for_each_pci_msi_entry(entry, dev) - pci_msix_mask(entry); + msi_for_each_desc(desc, &dev->dev, MSI_DESC_ALL) + pci_msix_mask(desc); pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0); pci_intx_for_msi(dev, 1);
WARNING: multiple messages have this Message-ID (diff)
From: Thomas Gleixner <tglx@linutronix.de> To: LKML <linux-kernel@vger.kernel.org> Cc: Bjorn Helgaas <helgaas@kernel.org>, Marc Zygnier <maz@kernel.org>, Alex Williamson <alex.williamson@redhat.com>, Kevin Tian <kevin.tian@intel.com>, Jason Gunthorpe <jgg@nvidia.com>, Megha Dey <megha.dey@intel.com>, Ashok Raj <ashok.raj@intel.com>, linux-pci@vger.kernel.org, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, linux-s390@vger.kernel.org, Heiko Carstens <hca@linux.ibm.com>, Christian Borntraeger <borntraeger@de.ibm.com>, Jon Mason <jdmason@kudzu.us>, Dave Jiang <dave.jiang@intel.com>, Allen Hubbe <allenbh@gmail.com>, linux-ntb@googlegroups.com Subject: [patch 11/32] PCI/MSI: Use msi_on_each_desc() Date: Sat, 27 Nov 2021 02:23:46 +0100 (CET) [thread overview] Message-ID: <20211126232734.949173952@linutronix.de> (raw) Message-ID: <20211127012346.xRa7Zm3p1Sr-6T2Dg82EAccmD48SGhs31tk0_zViL2s@z> (raw) In-Reply-To: 20211126230957.239391799@linutronix.de Use the new iterator functions which pave the way for dynamically extending MSI-X vectors. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> --- drivers/pci/msi/irqdomain.c | 4 ++-- drivers/pci/msi/legacy.c | 19 ++++++++----------- drivers/pci/msi/msi.c | 30 ++++++++++++++---------------- 3 files changed, 24 insertions(+), 29 deletions(-) --- a/drivers/pci/msi/irqdomain.c +++ b/drivers/pci/msi/irqdomain.c @@ -83,7 +83,7 @@ static int pci_msi_domain_check_cap(stru struct msi_domain_info *info, struct device *dev) { - struct msi_desc *desc = first_pci_msi_entry(to_pci_dev(dev)); + struct msi_desc *desc = msi_first_desc(dev); /* Special handling to support __pci_enable_msi_range() */ if (pci_msi_desc_is_multi_msi(desc) && @@ -98,7 +98,7 @@ static int pci_msi_domain_check_cap(stru unsigned int idx = 0; /* Check for gaps in the entry indices */ - for_each_msi_entry(desc, dev) { + msi_for_each_desc(desc, dev, MSI_DESC_ALL) { if (desc->msi_index != idx++) return -ENOTSUPP; } --- a/drivers/pci/msi/legacy.c +++ b/drivers/pci/msi/legacy.c @@ -29,7 +29,7 @@ int __weak arch_setup_msi_irqs(struct pc if (type == PCI_CAP_ID_MSI && nvec > 1) return 1; - for_each_pci_msi_entry(desc, dev) { + msi_for_each_desc(desc, &dev->dev, MSI_DESC_NOTASSOCIATED) { ret = arch_setup_msi_irq(dev, desc); if (ret) return ret < 0 ? ret : -ENOSPC; @@ -43,27 +43,24 @@ void __weak arch_teardown_msi_irqs(struc struct msi_desc *desc; int i; - for_each_pci_msi_entry(desc, dev) { - if (desc->irq) { - for (i = 0; i < entry->nvec_used; i++) - arch_teardown_msi_irq(desc->irq + i); - } + msi_for_each_desc(desc, &dev->dev, MSI_DESC_ASSOCIATED) { + for (i = 0; i < desc->nvec_used; i++) + arch_teardown_msi_irq(desc->irq + i); } } static int pci_msi_setup_check_result(struct pci_dev *dev, int type, int ret) { - struct msi_desc *entry; + struct msi_desc *desc; int avail = 0; if (type != PCI_CAP_ID_MSIX || ret >= 0) return ret; /* Scan the MSI descriptors for successfully allocated ones. */ - for_each_pci_msi_entry(entry, dev) { - if (entry->irq != 0) - avail++; - } + msi_for_each_desc(desc, &dev->dev, MSI_DESC_ASSOCIATED) + avail++; + return avail ? avail : ret; } --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -299,7 +299,6 @@ static void __pci_restore_msix_state(str if (!dev->msix_enabled) return; - BUG_ON(list_empty(dev_to_msi_list(&dev->dev))); /* route the table */ pci_intx_for_msi(dev, 0); @@ -309,7 +308,7 @@ static void __pci_restore_msix_state(str write_msg = arch_restore_msi_irqs(dev); msi_lock_descs(&dev->dev); - for_each_pci_msi_entry(entry, dev) { + msi_for_each_desc(entry, &dev->dev, MSI_DESC_ALL) { if (write_msg) __pci_write_msi_msg(entry, &entry->msg); pci_msix_write_vector_ctrl(entry, entry->pci.msix_ctrl); @@ -378,14 +377,14 @@ static int msi_verify_entries(struct pci if (!dev->no_64bit_msi) return 0; - for_each_pci_msi_entry(entry, dev) { + msi_for_each_desc(entry, &dev->dev, MSI_DESC_ALL) { if (entry->msg.address_hi) { pci_err(dev, "arch assigned 64-bit MSI address %#x%08x but device only supports 32 bits\n", entry->msg.address_hi, entry->msg.address_lo); - return -EIO; + break; } } - return 0; + return !entry ? 0 : -EIO; } /** @@ -418,7 +417,7 @@ static int msi_capability_init(struct pc goto unlock; /* All MSIs are unmasked by default; mask them all */ - entry = first_pci_msi_entry(dev); + entry = msi_first_desc(&dev->dev); pci_msi_mask(entry, msi_multi_mask(entry)); /* Configure MSI capability structure */ @@ -508,11 +507,11 @@ static int msix_setup_msi_descs(struct p static void msix_update_entries(struct pci_dev *dev, struct msix_entry *entries) { - struct msi_desc *entry; + struct msi_desc *desc; if (entries) { - for_each_pci_msi_entry(entry, dev) { - entries->vector = entry->irq; + msi_for_each_desc(desc, &dev->dev, MSI_DESC_ALL) { + entries->vector = desc->irq; entries++; } } @@ -705,15 +704,14 @@ static void pci_msi_shutdown(struct pci_ if (!pci_msi_enable || !dev || !dev->msi_enabled) return; - BUG_ON(list_empty(dev_to_msi_list(&dev->dev))); - desc = first_pci_msi_entry(dev); - pci_msi_set_enable(dev, 0); pci_intx_for_msi(dev, 1); dev->msi_enabled = 0; /* Return the device with MSI unmasked as initial states */ - pci_msi_unmask(desc, msi_multi_mask(desc)); + desc = msi_first_desc(&dev->dev); + if (!WARN_ON_ONCE(!desc)) + pci_msi_unmask(desc, msi_multi_mask(desc)); /* Restore dev->irq to its default pin-assertion IRQ */ dev->irq = desc->pci.msi_attrib.default_irq; @@ -789,7 +787,7 @@ static int __pci_enable_msix(struct pci_ static void pci_msix_shutdown(struct pci_dev *dev) { - struct msi_desc *entry; + struct msi_desc *desc; if (!pci_msi_enable || !dev || !dev->msix_enabled) return; @@ -800,8 +798,8 @@ static void pci_msix_shutdown(struct pci } /* Return the device with MSI-X masked as initial states */ - for_each_pci_msi_entry(entry, dev) - pci_msix_mask(entry); + msi_for_each_desc(desc, &dev->dev, MSI_DESC_ALL) + pci_msix_mask(desc); pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0); pci_intx_for_msi(dev, 1);
next prev parent reply other threads:[~2021-11-27 1:29 UTC|newest] Thread overview: 182+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-11-27 1:22 [patch 00/32] genirq/msi, PCI/MSI: Spring cleaning - Part 2 Thomas Gleixner 2021-11-27 1:22 ` [patch 01/32] genirq/msi: Move descriptor list to struct msi_device_data Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 12:19 ` Greg Kroah-Hartman 2021-11-27 1:22 ` [patch 02/32] genirq/msi: Add mutex for MSI list protection Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 03/32] genirq/msi: Provide msi_domain_alloc/free_irqs_descs_locked() Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 04/32] genirq/msi: Provide a set of advanced MSI accessors and iterators Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-28 1:00 ` Jason Gunthorpe 2021-11-28 19:22 ` Thomas Gleixner 2021-11-29 9:26 ` Thomas Gleixner 2021-11-29 14:01 ` Jason Gunthorpe 2021-11-29 14:46 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 05/32] genirq/msi: Provide msi_alloc_msi_desc() and a simple allocator Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 06/32] genirq/msi: Provide domain flags to allocate/free MSI descriptors automatically Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 07/32] genirq/msi: Count the allocated MSI descriptors Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 12:19 ` Greg Kroah-Hartman 2021-11-27 19:22 ` Thomas Gleixner 2021-11-27 19:45 ` Thomas Gleixner 2021-11-28 11:07 ` Greg Kroah-Hartman 2021-11-28 19:23 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 08/32] PCI/MSI: Protect MSI operations Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 09/32] PCI/MSI: Use msi_add_msi_desc() Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 10/32] PCI/MSI: Let core code free MSI descriptors Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 1:22 ` Thomas Gleixner [this message] 2021-11-27 1:23 ` [patch 11/32] PCI/MSI: Use msi_on_each_desc() Thomas Gleixner 2021-11-27 1:22 ` [patch 12/32] x86/pci/xen: Use msi_for_each_desc() Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 13/32] xen/pcifront: Rework MSI handling Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 14/32] s390/pci: Rework MSI descriptor walk Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-29 10:31 ` Niklas Schnelle 2021-11-29 13:04 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 15/32] powerpc/4xx/hsta: Rework MSI handling Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 16/32] powerpc/cell/axon_msi: Convert to msi_on_each_desc() Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 17/32] powerpc/pasemi/msi: Convert to msi_on_each_dec() Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 18/32] powerpc/fsl_msi: Use msi_for_each_desc() Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 19/32] powerpc/mpic_u3msi: Use msi_for_each-desc() Thomas Gleixner 2021-11-27 1:23 ` Thomas Gleixner 2021-11-27 1:22 ` [patch 20/32] PCI: hv: Rework MSI handling Thomas Gleixner 2021-11-27 1:24 ` Thomas Gleixner 2021-11-27 1:23 ` [patch 21/32] NTB/msi: Convert to msi_on_each_desc() Thomas Gleixner 2021-11-27 1:24 ` Thomas Gleixner 2021-11-29 18:21 ` Logan Gunthorpe 2021-11-29 20:51 ` Thomas Gleixner 2021-11-29 22:27 ` Logan Gunthorpe 2021-11-29 22:50 ` Dave Jiang 2021-11-29 23:31 ` Jason Gunthorpe 2021-11-29 23:52 ` Logan Gunthorpe 2021-11-30 0:01 ` Jason Gunthorpe 2021-11-30 0:29 ` Thomas Gleixner 2021-11-30 19:21 ` Logan Gunthorpe 2021-11-30 19:48 ` Thomas Gleixner 2021-11-30 20:14 ` Logan Gunthorpe 2021-11-30 20:28 ` Jason Gunthorpe 2021-11-30 21:23 ` Thomas Gleixner 2021-12-01 0:17 ` Jason Gunthorpe 2021-12-01 10:16 ` Thomas Gleixner 2021-12-01 13:00 ` Jason Gunthorpe 2021-12-01 17:35 ` Thomas Gleixner 2021-12-01 18:14 ` Jason Gunthorpe 2021-12-01 18:46 ` Logan Gunthorpe 2021-12-01 20:21 ` Thomas Gleixner 2021-12-02 0:01 ` Thomas Gleixner 2021-12-02 13:55 ` Jason Gunthorpe 2021-12-02 14:23 ` Greg Kroah-Hartman 2021-12-02 14:45 ` Jason Gunthorpe 2021-12-02 19:25 ` Thomas Gleixner 2021-12-02 20:00 ` Jason Gunthorpe 2021-12-02 22:31 ` Thomas Gleixner 2021-12-03 0:37 ` Jason Gunthorpe 2021-12-03 15:07 ` Thomas Gleixner 2021-12-03 16:41 ` Jason Gunthorpe 2021-12-04 14:20 ` Thomas Gleixner 2021-12-05 14:16 ` Thomas Gleixner 2021-12-06 14:43 ` Jason Gunthorpe 2021-12-06 15:47 ` Thomas Gleixner 2021-12-06 17:00 ` Jason Gunthorpe 2021-12-06 20:28 ` Thomas Gleixner 2021-12-06 21:06 ` Jason Gunthorpe 2021-12-06 22:21 ` Thomas Gleixner 2021-12-06 14:19 ` Jason Gunthorpe 2021-12-06 15:06 ` Thomas Gleixner 2021-12-09 6:26 ` Tian, Kevin 2021-12-09 9:03 ` Thomas Gleixner 2021-12-09 12:17 ` Tian, Kevin 2021-12-09 15:57 ` Thomas Gleixner 2021-12-10 7:37 ` Tian, Kevin 2021-12-09 5:41 ` Tian, Kevin 2021-12-09 5:47 ` Jason Wang 2021-12-01 16:28 ` Dave Jiang 2021-12-01 18:41 ` Thomas Gleixner 2021-12-01 18:47 ` Dave Jiang 2021-12-01 20:25 ` Thomas Gleixner 2021-12-01 21:21 ` Dave Jiang 2021-12-01 21:44 ` Thomas Gleixner 2021-12-01 21:49 ` Dave Jiang 2021-12-01 22:03 ` Thomas Gleixner 2021-12-01 22:53 ` Dave Jiang 2021-12-01 23:57 ` Thomas Gleixner 2021-12-09 5:23 ` Tian, Kevin 2021-12-09 8:37 ` Thomas Gleixner 2021-12-09 12:31 ` Tian, Kevin 2021-12-09 16:21 ` Jason Gunthorpe 2021-12-09 20:32 ` Thomas Gleixner 2021-12-09 20:58 ` Jason Gunthorpe 2021-12-09 22:09 ` Thomas Gleixner 2021-12-10 0:26 ` Thomas Gleixner 2021-12-10 7:29 ` Tian, Kevin 2021-12-10 12:13 ` Thomas Gleixner 2021-12-11 8:06 ` Tian, Kevin 2021-12-10 12:39 ` Jason Gunthorpe 2021-12-10 19:00 ` Thomas Gleixner 2021-12-11 7:44 ` Tian, Kevin 2021-12-11 13:04 ` Thomas Gleixner 2021-12-12 1:56 ` Tian, Kevin 2021-12-12 20:55 ` Thomas Gleixner 2021-12-12 23:37 ` Jason Gunthorpe 2021-12-13 7:50 ` Tian, Kevin 2022-09-15 9:24 ` Tian, Kevin 2022-09-20 14:09 ` Jason Gunthorpe 2022-09-21 7:57 ` Tian, Kevin 2022-09-21 12:48 ` Jason Gunthorpe 2022-09-22 5:11 ` Tian, Kevin 2022-09-22 12:13 ` Jason Gunthorpe 2022-09-22 22:42 ` Tian, Kevin 2022-09-23 13:26 ` Jason Gunthorpe 2021-12-11 7:52 ` Tian, Kevin 2021-12-12 0:12 ` Thomas Gleixner 2021-12-12 2:14 ` Tian, Kevin 2021-12-12 20:50 ` Thomas Gleixner 2021-12-12 23:42 ` Jason Gunthorpe 2021-12-10 7:36 ` Tian, Kevin 2021-12-10 12:30 ` Jason Gunthorpe 2021-12-12 6:44 ` Mika Penttilä 2021-12-12 23:27 ` Jason Gunthorpe 2021-12-01 14:52 ` Thomas Gleixner 2021-12-01 15:11 ` Jason Gunthorpe 2021-12-01 18:37 ` Thomas Gleixner 2021-12-01 18:47 ` Jason Gunthorpe 2021-12-01 20:26 ` Thomas Gleixner 2021-11-27 1:23 ` [patch 22/32] soc: ti: ti_sci_inta_msi: Rework MSI descriptor allocation Thomas Gleixner 2021-11-27 1:24 ` Thomas Gleixner 2021-11-27 1:23 ` [patch 23/32] soc: ti: ti_sci_inta_msi: Remove ti_sci_inta_msi_domain_free_irqs() Thomas Gleixner 2021-11-27 1:24 ` Thomas Gleixner 2021-11-27 1:23 ` [patch 24/32] bus: fsl-mc-msi: Simplify MSI descriptor handling Thomas Gleixner 2021-11-27 1:24 ` Thomas Gleixner 2021-11-27 1:23 ` [patch 25/32] platform-msi: Let core code handle MSI descriptors Thomas Gleixner 2021-11-27 1:24 ` Thomas Gleixner 2021-11-27 1:23 ` [patch 26/32] platform-msi: Simplify platform device MSI code Thomas Gleixner 2021-11-27 1:24 ` Thomas Gleixner 2021-11-27 1:23 ` [patch 27/32] genirq/msi: Make interrupt allocation less convoluted Thomas Gleixner 2021-11-27 1:24 ` Thomas Gleixner 2021-11-27 1:23 ` [patch 28/32] genirq/msi: Convert to new functions Thomas Gleixner 2021-11-27 1:24 ` Thomas Gleixner 2021-11-27 1:23 ` [patch 29/32] genirq/msi: Mop up old interfaces Thomas Gleixner 2021-11-27 1:24 ` Thomas Gleixner 2021-11-27 1:23 ` [patch 30/32] genirq/msi: Add abuse prevention comment to msi header Thomas Gleixner 2021-11-27 1:24 ` Thomas Gleixner 2021-11-27 1:23 ` [patch 31/32] genirq/msi: Simplify sysfs handling Thomas Gleixner 2021-11-27 1:24 ` Thomas Gleixner 2021-11-27 12:32 ` Greg Kroah-Hartman 2021-11-27 19:31 ` Thomas Gleixner 2021-11-28 11:07 ` Greg Kroah-Hartman 2021-11-28 19:33 ` Thomas Gleixner 2021-11-27 1:23 ` [patch 32/32] genirq/msi: Convert storage to xarray Thomas Gleixner 2021-11-27 1:24 ` Thomas Gleixner 2021-11-27 12:33 ` Greg Kroah-Hartman 2021-11-27 1:23 ` [patch 00/32] genirq/msi, PCI/MSI: Spring cleaning - Part 2 Thomas Gleixner
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