From: "Marek Behún" <kabel@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: pali@kernel.org, linux-pci@vger.kernel.org,
"Marek Behún" <kabel@kernel.org>
Subject: [PATCH v3 03/11] PCI: aardvark: Add support for DEVCAP2, DEVCTL2, LNKCAP2 and LNKCTL2 registers on emulated bridge
Date: Tue, 30 Nov 2021 14:25:15 +0100 [thread overview]
Message-ID: <20211130132523.28126-4-kabel@kernel.org> (raw)
In-Reply-To: <20211130132523.28126-1-kabel@kernel.org>
From: Pali Rohár <pali@kernel.org>
PCI aardvark hardware supports access to DEVCAP2, DEVCTL2, LNKCAP2 and
LNKCTL2 configuration registers of PCIe core via PCIE_CORE_PCIEXP_CAP.
Export them via emulated software root bridge.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
drivers/pci/controller/pci-aardvark.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index c5300d49807a..25af189a1052 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -884,8 +884,13 @@ advk_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
case PCI_CAP_LIST_ID:
case PCI_EXP_DEVCAP:
case PCI_EXP_DEVCTL:
+ case PCI_EXP_DEVCAP2:
+ case PCI_EXP_DEVCTL2:
+ case PCI_EXP_LNKCAP2:
+ case PCI_EXP_LNKCTL2:
*value = advk_readl(pcie, PCIE_CORE_PCIEXP_CAP + reg);
return PCI_BRIDGE_EMUL_HANDLED;
+
default:
return PCI_BRIDGE_EMUL_NOT_HANDLED;
}
@@ -899,10 +904,6 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
struct advk_pcie *pcie = bridge->data;
switch (reg) {
- case PCI_EXP_DEVCTL:
- advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);
- break;
-
case PCI_EXP_LNKCTL:
advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);
if (new & PCI_EXP_LNKCTL_RL)
@@ -924,6 +925,12 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
advk_writel(pcie, new, PCIE_ISR0_REG);
break;
+ case PCI_EXP_DEVCTL:
+ case PCI_EXP_DEVCTL2:
+ case PCI_EXP_LNKCTL2:
+ advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);
+ break;
+
default:
break;
}
--
2.32.0
next prev parent reply other threads:[~2021-11-30 13:25 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-30 13:25 [PATCH v3 00/11] PCI: aardvark controller fixes BATCH 3 Marek Behún
2021-11-30 13:25 ` [PATCH v3 01/11] PCI: pci-bridge-emul: Add description for class_revision field Marek Behún
2021-11-30 13:25 ` [PATCH v3 02/11] PCI: pci-bridge-emul: Add definitions for missing capabilities registers Marek Behún
2021-11-30 13:25 ` Marek Behún [this message]
2021-11-30 13:25 ` [PATCH v3 04/11] PCI: aardvark: Clear all MSIs at setup Marek Behún
2021-11-30 13:25 ` [PATCH v3 05/11] PCI: aardvark: Comment actions in driver remove method Marek Behún
2021-11-30 13:25 ` [PATCH v3 06/11] PCI: aardvark: Disable bus mastering when unbinding driver Marek Behún
2021-11-30 13:25 ` [PATCH v3 07/11] PCI: aardvark: Mask all interrupts " Marek Behún
2021-11-30 13:25 ` [PATCH v3 08/11] PCI: aardvark: Fix memory leak in driver unbind Marek Behún
2021-11-30 13:25 ` [PATCH v3 09/11] PCI: aardvark: Assert PERST# when unbinding driver Marek Behún
2021-11-30 13:25 ` [PATCH v3 10/11] PCI: aardvark: Disable link training " Marek Behún
2021-11-30 13:25 ` [PATCH v3 11/11] PCI: aardvark: Disable common PHY " Marek Behún
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