From: Hector Martin <marcan@marcan.st>
To: Marc Zyngier <maz@kernel.org>, Sven Peter <sven@svenpeter.dev>
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Rob Herring <robh@kernel.org>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Hector Martin <marcan@marcan.st>
Subject: [PATCH] arm64: dts: apple: t8103: Remove PCIe max-link-speed properties
Date: Tue, 7 Dec 2021 14:34:58 +0900 [thread overview]
Message-ID: <20211207053458.17777-1-marcan@marcan.st> (raw)
The driver doesn't support these, they shouldn't be in the SoC include
anyway, and we're now configuring this in the bootloader instead. This
also solves the j274 1G/10G Ethernet variant discrepancy, since that
will now be configured properly based on the dynamic ADT property.
Signed-off-by: Hector Martin <marcan@marcan.st>
---
arch/arm64/boot/dts/apple/t8103.dtsi | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
index 15ee8c8c5fa0..8d1628e0b0c7 100644
--- a/arch/arm64/boot/dts/apple/t8103.dtsi
+++ b/arch/arm64/boot/dts/apple/t8103.dtsi
@@ -412,7 +412,6 @@ port00: pci@0,0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 152 0>;
- max-link-speed = <2>;
#address-cells = <3>;
#size-cells = <2>;
@@ -432,7 +431,6 @@ port01: pci@1,0 {
device_type = "pci";
reg = <0x800 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 153 0>;
- max-link-speed = <2>;
#address-cells = <3>;
#size-cells = <2>;
@@ -452,7 +450,6 @@ port02: pci@2,0 {
device_type = "pci";
reg = <0x1000 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 33 0>;
- max-link-speed = <1>;
#address-cells = <3>;
#size-cells = <2>;
--
2.33.0
next reply other threads:[~2021-12-07 5:35 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-07 5:34 Hector Martin [this message]
2021-12-07 9:29 ` [PATCH] arm64: dts: apple: t8103: Remove PCIe max-link-speed properties Marc Zyngier
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