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From: "Marek Behún" <kabel@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-pci@vger.kernel.org, pali@kernel.org,
	"Marek Behún" <kabel@kernel.org>
Subject: [PATCH 08/17] PCI: aardvark: Enable MSI-X support
Date: Wed,  8 Dec 2021 07:18:42 +0100	[thread overview]
Message-ID: <20211208061851.31867-9-kabel@kernel.org> (raw)
In-Reply-To: <20211208061851.31867-1-kabel@kernel.org>

From: Pali Rohár <pali@kernel.org>

According to PCI 3.0 specification, sending both MSI and MSI-X interrupts
is done by DWORD memory write operation to doorbell message address. The
write operation for MSI has zero upper 16 bits and the MSI interrupt number
in the lower 16 bits, while the write operation for MSI-X contains a 32-bit
value from MSI-X table.

Since the driver only uses interrupt numbers from range 0..31, the upper
16 bits of the DWORD memory write operation to doorbell message address
are zero even for MSI-X interrupts. Thus we can enable MSI-X interrupts.

Testing proves that kernel can correctly receive MSI-X interrupts from PCIe
cards which supports both MSI and MSI-X interrupts.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
 drivers/pci/controller/pci-aardvark.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index d518cface0a7..24c67dc983e5 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -1360,7 +1360,7 @@ static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie)
 
 	msi_di = &pcie->msi_domain_info;
 	msi_di->flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
-		MSI_FLAG_MULTI_PCI_MSI;
+			MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX;
 	msi_di->chip = msi_ic;
 
 	pcie->msi_inner_domain =
-- 
2.32.0


  parent reply	other threads:[~2021-12-08  6:19 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-08  6:18 [PATCH 00/17] PCI: aardvark controller fixes BATCH 4 Marek Behún
2021-12-08  6:18 ` [PATCH 01/17] PCI: aardvark: Drop __maybe_unused from advk_pcie_disable_phy() Marek Behún
2021-12-08  6:18 ` [PATCH 02/17] PCI: aardvark: Rewrite IRQ code to chained IRQ handler Marek Behún
2021-12-08  6:18 ` [PATCH 03/17] PCI: aardvark: Fix support for MSI interrupts Marek Behún
2021-12-08  6:18 ` [PATCH 04/17] PCI: aardvark: Fix reading MSI interrupt number Marek Behún
2021-12-08  6:18 ` [PATCH 05/17] PCI: aardvark: Refactor unmasking summary MSI interrupt Marek Behún
2021-12-08  6:18 ` [PATCH 06/17] PCI: aardvark: Add support for masking MSI interrupts Marek Behún
2021-12-08  6:18 ` [PATCH 07/17] PCI: aardvark: Fix setting MSI address Marek Behún
2021-12-08  6:18 ` Marek Behún [this message]
2021-12-08  6:18 ` [PATCH 09/17] PCI: aardvark: Add support for ERR interrupt on emulated bridge Marek Behún
2021-12-08  6:18 ` [PATCH 10/17] PCI: aardvark: Fix reading PCI_EXP_RTSTA_PME bit " Marek Behún
2021-12-08  6:18 ` [PATCH 11/17] PCI: aardvark: Optimize writing PCI_EXP_RTCTL_PMEIE and PCI_EXP_RTSTA_PME " Marek Behún
2021-12-08  6:18 ` [PATCH 12/17] PCI: aardvark: Add support for PME interrupts Marek Behún
2021-12-08  6:18 ` [PATCH 13/17] PCI: aardvark: Fix support for PME requester on emulated bridge Marek Behún
2022-01-05 11:07   ` Marek Behún
2021-12-08  6:18 ` [PATCH 14/17] PCI: aardvark: Use separate INTA interrupt for emulated root bridge Marek Behún
2021-12-08  6:18 ` [PATCH 15/17] PCI: aardvark: Check return value of generic_handle_domain_irq() when processing INTx IRQ Marek Behún
2021-12-08  6:18 ` [PATCH 16/17] PCI: aardvark: Remove irq_mask_ack callback for INTx interrupts Marek Behún
2021-12-08  6:18 ` [PATCH 17/17] PCI: aardvark: Don't mask irq when mapping Marek Behún
2021-12-08  6:22 ` [PATCH 00/17] PCI: aardvark controller fixes BATCH 4 Marek Behún
2021-12-08  7:55   ` Marc Zyngier
2022-01-04 18:41     ` Marek Behún

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