[RESEND PATCH v2 4/4] PCI: xilinx-nwl: Add method to setup_platform_service_irq hook

Stefan Roese
2022-01-12T09:43:02Z

From: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>

Add nwl_setup_service_irqs hook to setup_platform_service_irq to
register platform provided IRQ number to kernel AER service.

Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Cc: Bjorn Helgaas <helgaas@kernel.org>
Cc: Pali Rohár <pali@kernel.org>
Cc: Michal Simek <michal.simek@xilinx.com>
---
drivers/pci/controller/pcie-xilinx-nwl.c | 12 ++++++++++++
1 file changed, 12 insertions(+)

diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c
index 414b679175b3..4969f35db7e5 100644
--- a/drivers/pci/controller/pcie-xilinx-nwl.c
+++ b/drivers/pci/controller/pcie-xilinx-nwl.c
@@ -24,6 +24,7 @@
#include <linux/irqchip/chained_irq.h>

#include "../pci.h"
+#include "../pcie/portdrv.h"

/* Bridge core config registers */
#define BRCFG_PCIE_RX0 0x00000000
@@ -806,6 +807,16 @@ static int nwl_pcie_parse_dt(struct nwl_pcie *pcie,
return 0;
}

+static void nwl_setup_service_irqs(struct pci_host_bridge *bridge, int *irqs,
+ int plat_mask)
+{
+ struct nwl_pcie *pcie;
+
+ pcie = pci_host_bridge_priv(bridge);
+ if (plat_mask & PCIE_PORT_SERVICE_AER)
+ irqs[PCIE_PORT_SERVICE_AER_SHIFT] = pcie->irq_misc;
+}
+
static const struct of_device_id nwl_pcie_of_match[] = {
{ .compatible = "xlnx,nwl-pcie-2.11", },
{}
@@ -857,6 +868,7 @@ static int nwl_pcie_probe(struct platform_device *pdev)

bridge->sysdata = pcie;
bridge->ops = &nwl_pcie_ops;
+ bridge->setup_platform_service_irq = nwl_setup_service_irqs;

if (IS_ENABLED(CONFIG_PCI_MSI)) {
err = nwl_pcie_enable_msi(pcie);
--
2.34.1