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Date:   Fri, 21 Jan 2022 13:42:35 -0600
From:   Bjorn Helgaas <helgaas@kernel.org>
To:     Vikash Bansal <bvikas@vmware.com>
Cc:     Greg KH <gregkh@linuxfoundation.org>,
        "bhelgaas@google.com" <bhelgaas@google.com>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Srivatsa Bhat <srivatsab@vmware.com>,
        "srivatsa@csail.mit.edu" <srivatsa@csail.mit.edu>,
        Alexey Makhalov <amakhalov@vmware.com>,
        Srinidhi Rao <srinidhir@vmware.com>,
        Anish Swaminathan <anishs@vmware.com>,
        Vasavi Sirnapalli <vsirnapalli@vmware.com>,
        Ajay Kaher <akaher@vmware.com>
Subject: Re: [PATCH] PCI: Speed up device init by parsing capabilities all at
 once
Message-ID: <20220121194235.GA1146009@bhelgaas>
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On Fri, Jan 21, 2022 at 05:26:35PM +0000, Vikash Bansal wrote:
>     On 20/01/22, 11:56 AM, "Greg KH" <gregkh@linuxfoundation.org> wrote:
> 
>     Run pahole for pci_dev structure, it is not adding any padding bytes.
>     Please refer to my previous email for replies to Greg's other comments. 

Please don't indent your entire response.  The original posting
apparently didn't go to linux-pci@vger.kernel.org or was rejected,
maybe because it wasn't plain text (see
http://vger.kernel.org/majordomo-info.html)?

It doesn't appear in the thread at
https://lore.kernel.org/all/7E2C2648-76CE-4987-AB4F-7B4576F10D7B@vmware.com/ 

>     >On Tue, Jan 18, 2022 at 09:16:01AM -0800, Vikash Bansal wrote:
>     >> In the current implementation, the PCI capability list is parsed from
>     >> the beginning to find each capability, which results in a large number
>     >> of redundant PCI reads.
>     >>
>     >> Instead, we can parse the complete list just once, store it in the
>     >> pci_dev structure, and get the offset of each capability directly from
>     >> the pci_dev structure.

> ...