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Date:   Fri, 11 Feb 2022 17:57:33 +0000
From:   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To:     Stephen Boyd <swboyd@chromium.org>
Cc:     Andy Gross <agross@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
        Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= <kw@linux.com>,
        Rob Herring <robh+dt@kernel.org>,
        linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
        Prasad Malisetty <pmaliset@codeaurora.org>
Subject: Re: [PATCH 0/3] PCI: qcom: pipe_clk_src fixes for pcie-qcom driver
Message-ID: <20220211175733.GB2300@lpieralisi>
References: <20211218140223.500390-1-dmitry.baryshkov@linaro.org>
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On Thu, Feb 03, 2022 at 09:11:44PM +0000, Stephen Boyd wrote:
> Quoting Dmitry Baryshkov (2021-12-18 06:02:20)
> > After comparing upstream and downstream Qualcomm PCIe drivers, change
> > the way the driver works with the pipe_clk_src multiplexing.
> >
> > The clock should be switched to using ref_clk (TCXO) as a parent before
> > turning the PCIE_x_GDSC power domain off and can be switched to using
> > PHY's pipe_clk after this power domain is turned on.
> >
> > Downstream driver uses regulators for the GDSC, so current approach also
> > (incorrectly) uses them. However upstream driver uses power-domain and
> > so GDSC is maintained using pm_runtime_foo() calls. Change order of
> > operations to implement these requirements.
> 
> Prasad, can you test/review this series?

Waiting for testing/review and Bjorn/Andy ACKs.

Lorenzo