From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Frank Li <Frank.Li@nxp.com>
Cc: gustavo.pimentel@synopsys.com, hongxing.zhu@nxp.com,
l.stach@pengutronix.de, linux-imx@nxp.com,
linux-pci@vger.kernel.org, dmaengine@vger.kernel.org,
fancer.lancer@gmail.com, lznuaa@gmail.com, helgaas@kernel.org,
vkoul@kernel.org, lorenzo.pieralisi@arm.com, robh@kernel.org,
kw@linux.com, bhelgaas@google.com,
Sergey.Semin@baikalelectronics.ru
Subject: Re: [PATCH v9 2/9] dmaengine: dw-edma: Detach the private data and chip info structures
Date: Sat, 23 Apr 2022 17:27:06 +0530 [thread overview]
Message-ID: <20220423115706.GE374560@thinkpad> (raw)
In-Reply-To: <20220422143643.727871-3-Frank.Li@nxp.com>
On Fri, Apr 22, 2022 at 09:36:36AM -0500, Frank Li wrote:
> "struct dw_edma_chip" contains an internal structure "struct dw_edma" that
> is used by the eDMA core internally. This structure should not be touched
> by the eDMA controller drivers themselves. But currently, the eDMA
> controller drivers like "dw-edma-pci" allocates and populates this
> internal structure then passes it on to eDMA core. The eDMA core further
> populates the structure and uses it. This is wrong!
>
> Hence, move all the "struct dw_edma" specifics from controller drivers
> to the eDMA core.
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
There is a comment below, but other that that:
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> Change from v8 to v9
> - remove chip->ops check at dw_edma_irq_request()
> Change from v7 to v8
> - Check chip->ops at probe()
> - use struct edma_dw at dw_edma_v0_debugfs_on/off()
>
> Change from v6 to v7
> - Move nr_irqs and chip->ops check into dw_edma_irq_request()
> - Move dw->irq devm_kcalloc() into dw_edma_irq_request()
> - Change dw->nr_irqs after request success
> - Fix wrong use chip->nr_irqs when remove
>
> Change from v5 to v6
> - Don't touch chip->nr_irqs
> - Don't set chip->dw utill everything is okay
> - dw_edma_channel_setup() and dw_edma_v0_core_debugfs_on/off() methods take
> dw_edma structure pointer as a parameter
>
> Change from v4 to v5
> - Move chip->nr_irqs before allocate dw_edma
> Change from v3 to v4
> - Accept most suggestions of Serge Semin
> Change from v2 to v3
> - none
> Change from v1 to v2
> - rework commit message
> - remove duplicate field in struct dw_edma
>
>
> drivers/dma/dw-edma/dw-edma-core.c | 90 +++++++++++++-----------
> drivers/dma/dw-edma/dw-edma-core.h | 31 +-------
> drivers/dma/dw-edma/dw-edma-pcie.c | 82 +++++++++------------
> drivers/dma/dw-edma/dw-edma-v0-core.c | 32 ++++-----
> drivers/dma/dw-edma/dw-edma-v0-core.h | 4 +-
> drivers/dma/dw-edma/dw-edma-v0-debugfs.c | 18 ++---
> drivers/dma/dw-edma/dw-edma-v0-debugfs.h | 8 +--
> include/linux/dma/edma.h | 44 ++++++++++++
> 8 files changed, 161 insertions(+), 148 deletions(-)
>
[...]
> diff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h
> index d4333e721588d..6fd374cc72c8e 100644
> --- a/include/linux/dma/edma.h
> +++ b/include/linux/dma/edma.h
> @@ -12,17 +12,61 @@
> #include <linux/device.h>
> #include <linux/dmaengine.h>
>
> +#define EDMA_MAX_WR_CH 8
> +#define EDMA_MAX_RD_CH 8
> +
> struct dw_edma;
>
> +struct dw_edma_region {
> + phys_addr_t paddr;
> + void __iomem *vaddr;
> + size_t sz;
> +};
> +
> +struct dw_edma_core_ops {
> + int (*irq_vector)(struct device *dev, unsigned int nr);
> +};
> +
> +enum dw_edma_map_format {
> + EDMA_MF_EDMA_LEGACY = 0x0,
> + EDMA_MF_EDMA_UNROLL = 0x1,
> + EDMA_MF_HDMA_COMPAT = 0x5
> +};
> +
> /**
> * struct dw_edma_chip - representation of DesignWare eDMA controller hardware
> * @dev: struct device of the eDMA controller
> * @id: instance ID
> + * @nr_irqs: total dma irq number
> + * @ops DMA channel to IRQ number mapping
> + * @wr_ch_cnt DMA write channel number
> + * @rd_ch_cnt DMA read channel number
> + * @rg_region DMA register region
> + * @ll_region_wr DMA descriptor link list memory for write channel
> + * @ll_region_rd DMA descriptor link list memory for read channel
> + * @mf DMA register map format
Not all members added below are documented in kdoc. Please fix.
Thanks,
Mani
> * @dw: struct dw_edma that is filed by dw_edma_probe()
> */
> struct dw_edma_chip {
> struct device *dev;
> int id;
> + int nr_irqs;
> + const struct dw_edma_core_ops *ops;
> +
> + struct dw_edma_region rg_region;
> +
> + u16 wr_ch_cnt;
> + u16 rd_ch_cnt;
> + /* link list address */
> + struct dw_edma_region ll_region_wr[EDMA_MAX_WR_CH];
> + struct dw_edma_region ll_region_rd[EDMA_MAX_RD_CH];
> +
> + /* data region */
> + struct dw_edma_region dt_region_wr[EDMA_MAX_WR_CH];
> + struct dw_edma_region dt_region_rd[EDMA_MAX_RD_CH];
> +
> + enum dw_edma_map_format mf;
> +
> struct dw_edma *dw;
> };
>
> --
> 2.35.1
>
next prev parent reply other threads:[~2022-04-23 11:57 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-22 14:36 [PATCH v9 0/9] Enable designware PCI EP EDMA locally Frank Li
2022-04-22 14:36 ` [PATCH v9 1/9] dmaengine: dw-edma: Remove unused field irq in struct dw_edma_chip Frank Li
2022-04-23 11:49 ` Manivannan Sadhasivam
2022-04-22 14:36 ` [PATCH v9 2/9] dmaengine: dw-edma: Detach the private data and chip info structures Frank Li
2022-04-22 17:23 ` Serge Semin
2022-04-23 11:57 ` Manivannan Sadhasivam [this message]
2022-04-22 14:36 ` [PATCH v9 3/9] dmaengine: dw-edma: Change rg_region to reg_base in struct dw_edma_chip Frank Li
2022-04-23 11:59 ` Manivannan Sadhasivam
2022-04-22 14:36 ` [PATCH v9 4/9] dmaengine: dw-edma: Rename wr(rd)_ch_cnt to ll_wr(rd)_cnt " Frank Li
2022-04-23 12:12 ` Manivannan Sadhasivam
2022-04-23 21:47 ` Zhi Li
2022-04-27 16:45 ` Zhi Li
2022-04-27 17:18 ` Manivannan Sadhasivam
2022-04-22 14:36 ` [PATCH v9 5/9] dmaengine: dw-edma: Drop dma_slave_config.direction field usage Frank Li
2022-04-22 14:36 ` [PATCH v9 6/9] dmaengine: dw-edma: Fix eDMA Rd/Wr-channels and DMA-direction semantics Frank Li
2022-04-22 14:36 ` [PATCH v9 7/9] dmaengine: dw-edma: Add support for chip specific flags Frank Li
2022-04-23 12:14 ` Manivannan Sadhasivam
2022-04-22 14:36 ` [PATCH v9 8/9] dmaengine: dw-edma: Add DW_EDMA_CHIP_32BIT_DBI " Frank Li
2022-04-23 12:16 ` Manivannan Sadhasivam
2022-04-22 14:36 ` [PATCH v9 9/9] PCI: endpoint: Add embedded DMA controller test Frank Li
2022-04-23 12:20 ` Manivannan Sadhasivam
2022-04-27 9:30 ` Lorenzo Pieralisi
2022-04-27 17:01 ` Zhi Li
2022-04-29 15:38 ` Zhi Li
2022-04-22 17:53 ` [PATCH v9 0/9] Enable designware PCI EP EDMA locally Serge Semin
2022-04-22 17:57 ` Zhi Li
2022-04-22 18:13 ` Serge Semin
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