From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Frank Li <Frank.Li@nxp.com>
Cc: gustavo.pimentel@synopsys.com, hongxing.zhu@nxp.com,
l.stach@pengutronix.de, linux-imx@nxp.com,
linux-pci@vger.kernel.org, dmaengine@vger.kernel.org,
fancer.lancer@gmail.com, lznuaa@gmail.com, helgaas@kernel.org,
vkoul@kernel.org, lorenzo.pieralisi@arm.com, robh@kernel.org,
kw@linux.com, bhelgaas@google.com,
Sergey.Semin@baikalelectronics.ru
Subject: Re: [PATCH v9 7/9] dmaengine: dw-edma: Add support for chip specific flags
Date: Sat, 23 Apr 2022 17:44:13 +0530 [thread overview]
Message-ID: <20220423121413.GH374560@thinkpad> (raw)
In-Reply-To: <20220422143643.727871-8-Frank.Li@nxp.com>
On Fri, Apr 22, 2022 at 09:36:41AM -0500, Frank Li wrote:
> Add a "flags" field to the "struct dw_edma_chip" so that the controller
> drivers can pass flags that are relevant to the platform.
>
> DW_EDMA_CHIP_LOCAL - Used by the controller drivers accessing eDMA
> locally. Local eDMA access doesn't require generating MSIs to the remote.
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thanks,
Mani
> ---
> Change from v7 to v9
> -none
> Change from v6 to v7
> - dw_edma_chip_flags to u32
> Change from v5 to v6
> - use enum instead of define
>
> Change from v4 to v5
> - split two two patch
> - rework commit message
> Change from v3 to v4
> none
> Change from v2 to v3
> - rework commit message
> - Change to DW_EDMA_CHIP_32BIT_DBI
> - using DW_EDMA_CHIP_LOCAL control msi
> - Apply Bjorn's comments,
> if (!j) {
> control |= DW_EDMA_V0_LIE;
> if (!(chan->chip->flags & DW_EDMA_CHIP_LOCAL))
> control |= DW_EDMA_V0_RIE;
> }
>
> if ((chan->chip->flags & DW_EDMA_CHIP_REG32BIT) ||
> !IS_ENABLED(CONFIG_64BIT)) {
> SET_CH_32(...);
> SET_CH_32(...);
> } else {
> SET_CH_64(...);
> }
>
>
> Change from v1 to v2
> - none
>
> drivers/dma/dw-edma/dw-edma-v0-core.c | 9 ++++++---
> include/linux/dma/edma.h | 10 ++++++++++
> 2 files changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw-edma-v0-core.c
> index c59e23b9f9fdb..2ab1059a3de1e 100644
> --- a/drivers/dma/dw-edma/dw-edma-v0-core.c
> +++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
> @@ -301,6 +301,7 @@ u32 dw_edma_v0_core_status_abort_int(struct dw_edma *dw, enum dw_edma_dir dir)
> static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk)
> {
> struct dw_edma_burst *child;
> + struct dw_edma_chan *chan = chunk->chan;
> struct dw_edma_v0_lli __iomem *lli;
> struct dw_edma_v0_llp __iomem *llp;
> u32 control = 0, i = 0;
> @@ -314,9 +315,11 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk)
> j = chunk->bursts_alloc;
> list_for_each_entry(child, &chunk->burst->list, list) {
> j--;
> - if (!j)
> - control |= (DW_EDMA_V0_LIE | DW_EDMA_V0_RIE);
> -
> + if (!j) {
> + control |= DW_EDMA_V0_LIE;
> + if (!(chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL))
> + control |= DW_EDMA_V0_RIE;
> + }
> /* Channel control */
> SET_LL_32(&lli[i].control, control);
> /* Transfer size */
> diff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h
> index c2039246fc08c..fbd05a7284934 100644
> --- a/include/linux/dma/edma.h
> +++ b/include/linux/dma/edma.h
> @@ -33,12 +33,21 @@ enum dw_edma_map_format {
> EDMA_MF_HDMA_COMPAT = 0x5
> };
>
> +/**
> + * enum dw_edma_chip_flags - Flags specific to an eDMA chip
> + * @DW_EDMA_CHIP_LOCAL: eDMA is used locally by an endpoint
> + */
> +enum dw_edma_chip_flags {
> + DW_EDMA_CHIP_LOCAL = BIT(0),
> +};
> +
> /**
> * struct dw_edma_chip - representation of DesignWare eDMA controller hardware
> * @dev: struct device of the eDMA controller
> * @id: instance ID
> * @nr_irqs: total dma irq number
> * @ops DMA channel to IRQ number mapping
> + * @flags dw_edma_chip_flags
> * @reg_base DMA register base address
> * @ll_wr_cnt DMA write link list number
> * @ll_rd_cnt DMA read link list number
> @@ -53,6 +62,7 @@ struct dw_edma_chip {
> int id;
> int nr_irqs;
> const struct dw_edma_core_ops *ops;
> + u32 flags;
>
> void __iomem *reg_base;
>
> --
> 2.35.1
>
next prev parent reply other threads:[~2022-04-23 12:14 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-22 14:36 [PATCH v9 0/9] Enable designware PCI EP EDMA locally Frank Li
2022-04-22 14:36 ` [PATCH v9 1/9] dmaengine: dw-edma: Remove unused field irq in struct dw_edma_chip Frank Li
2022-04-23 11:49 ` Manivannan Sadhasivam
2022-04-22 14:36 ` [PATCH v9 2/9] dmaengine: dw-edma: Detach the private data and chip info structures Frank Li
2022-04-22 17:23 ` Serge Semin
2022-04-23 11:57 ` Manivannan Sadhasivam
2022-04-22 14:36 ` [PATCH v9 3/9] dmaengine: dw-edma: Change rg_region to reg_base in struct dw_edma_chip Frank Li
2022-04-23 11:59 ` Manivannan Sadhasivam
2022-04-22 14:36 ` [PATCH v9 4/9] dmaengine: dw-edma: Rename wr(rd)_ch_cnt to ll_wr(rd)_cnt " Frank Li
2022-04-23 12:12 ` Manivannan Sadhasivam
2022-04-23 21:47 ` Zhi Li
2022-04-27 16:45 ` Zhi Li
2022-04-27 17:18 ` Manivannan Sadhasivam
2022-04-22 14:36 ` [PATCH v9 5/9] dmaengine: dw-edma: Drop dma_slave_config.direction field usage Frank Li
2022-04-22 14:36 ` [PATCH v9 6/9] dmaengine: dw-edma: Fix eDMA Rd/Wr-channels and DMA-direction semantics Frank Li
2022-04-22 14:36 ` [PATCH v9 7/9] dmaengine: dw-edma: Add support for chip specific flags Frank Li
2022-04-23 12:14 ` Manivannan Sadhasivam [this message]
2022-04-22 14:36 ` [PATCH v9 8/9] dmaengine: dw-edma: Add DW_EDMA_CHIP_32BIT_DBI " Frank Li
2022-04-23 12:16 ` Manivannan Sadhasivam
2022-04-22 14:36 ` [PATCH v9 9/9] PCI: endpoint: Add embedded DMA controller test Frank Li
2022-04-23 12:20 ` Manivannan Sadhasivam
2022-04-27 9:30 ` Lorenzo Pieralisi
2022-04-27 17:01 ` Zhi Li
2022-04-29 15:38 ` Zhi Li
2022-04-22 17:53 ` [PATCH v9 0/9] Enable designware PCI EP EDMA locally Serge Semin
2022-04-22 17:57 ` Zhi Li
2022-04-22 18:13 ` Serge Semin
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