From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5019DCCA47B for ; Sun, 5 Jun 2022 13:53:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344154AbiFENxl (ORCPT ); Sun, 5 Jun 2022 09:53:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35192 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344286AbiFENxj (ORCPT ); Sun, 5 Jun 2022 09:53:39 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D428C2AF6; Sun, 5 Jun 2022 06:53:37 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 5A2DA60F9C; Sun, 5 Jun 2022 13:53:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9937DC341CC; Sun, 5 Jun 2022 13:53:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1654437216; bh=WUCCmgo0CJd1Oa1t/rXXnPa6NyR1QOuVmJ5dvv7/r0s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PXw0v7P3s+AtLeqAj3rJwOXFL0VhsfD5TKsS41WcocVQ8sx3CkNnOpTuT7Qrlhjmh 7B898rUwhHdLPZA8dyR6JwIzGq3tPMN/7qP62MUV3zGQWpVnynsHFJn8UffUFb8BNw ByflQ+tLd8f3SeHU+WbC1diXo2RCMkHvvgtS9WPrT3GLoNApCUfJksGo1V+8qs8K6C bwJdNe8PCF+v/pYDWMWY2im4hMmX/WjQwWY4Jid/ObZ0psybgSzp9MW93PE8ycBh3N miv3bdaL92QeaUdngJtDwSwR9BuAlymD2GwHOI5mBYg0kwDJIWhRuqlSlqIgErwhqn M5G/n6eNogrxA== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: "Maciej W. Rozycki" , Thomas Gleixner , Sasha Levin , bhelgaas@google.com, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, linux-pci@vger.kernel.org Subject: [PATCH MANUALSEL 5.18 7/7] x86/PCI: Add PIRQ routing table range checks Date: Sun, 5 Jun 2022 09:53:15 -0400 Message-Id: <20220605135320.61247-7-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220605135320.61247-1-sashal@kernel.org> References: <20220605135320.61247-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: "Maciej W. Rozycki" [ Upstream commit 5d64089aa4a5bd3d7e00e3d6ddf4943dd34627b3 ] Verify that the PCI IRQ Routing Table header as well as individual slot entries are all wholly contained within the BIOS memory area. Do not even call the checksum calculator if the header would overrun the area and then bail out early if any slot would. Signed-off-by: Maciej W. Rozycki Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/r/alpine.DEB.2.21.2203301735510.22465@angie.orcam.me.uk Signed-off-by: Sasha Levin --- arch/x86/pci/irq.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c index 97b63e35e152..13513003303e 100644 --- a/arch/x86/pci/irq.c +++ b/arch/x86/pci/irq.c @@ -68,7 +68,8 @@ void (*pcibios_disable_irq)(struct pci_dev *dev) = pirq_disable_irq; * and perform checksum verification. */ -static inline struct irq_routing_table *pirq_check_routing_table(u8 *addr) +static inline struct irq_routing_table *pirq_check_routing_table(u8 *addr, + u8 *limit) { struct irq_routing_table *rt; int i; @@ -78,7 +79,8 @@ static inline struct irq_routing_table *pirq_check_routing_table(u8 *addr) if (rt->signature != PIRQ_SIGNATURE || rt->version != PIRQ_VERSION || rt->size % 16 || - rt->size < sizeof(struct irq_routing_table)) + rt->size < sizeof(struct irq_routing_table) || + (limit && rt->size > limit - addr)) return NULL; sum = 0; for (i = 0; i < rt->size; i++) @@ -99,17 +101,22 @@ static inline struct irq_routing_table *pirq_check_routing_table(u8 *addr) static struct irq_routing_table * __init pirq_find_routing_table(void) { + u8 * const bios_start = (u8 *)__va(0xf0000); + u8 * const bios_end = (u8 *)__va(0x100000); u8 *addr; struct irq_routing_table *rt; if (pirq_table_addr) { - rt = pirq_check_routing_table((u8 *) __va(pirq_table_addr)); + rt = pirq_check_routing_table((u8 *)__va(pirq_table_addr), + NULL); if (rt) return rt; printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n"); } - for (addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) { - rt = pirq_check_routing_table(addr); + for (addr = bios_start; + addr < bios_end - sizeof(struct irq_routing_table); + addr += 16) { + rt = pirq_check_routing_table(addr, bios_end); if (rt) return rt; } -- 2.35.1